John Reuben Prabahar

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

A Multiplierless Architecture for Image Convolution in Memory (2025) Prabahar JR, Zeller F, Seiler B, Fey D Journal article On-chip READ and WRITE Circuits for Multi-bit Ferroelectric Tunnel Junction Memory (2024) Reuben JR, Lancaster S, Fey D, Slesazeck S Conference contribution In-Memory Implementation of an Approximate Adder With Reduced Latency and Error (2024) Lakshmi V, Pudi V, Reuben JR Journal article Hyper Dimensional Computing with Ferroelectric Tunneling Junctions (2024) Slesazeck S, Lancaster S, Prabahar JR, Hosseinzadeh S, Fey D, Mikolajick T Conference contribution A Low-Power Ternary Adder Using Ferroelectric Tunnel Junctions (2023) Reuben JR, Fey D, Lancaster S, Slesazeck S Journal article A Reference-less Sense Amplifier to Sense pA Currents in Ferroelectric Tunnel Junction Memories (2023) Reuben JR, Fey D, Slesazeck S Conference contribution Majority Logic Based In-Memory Comparator (2022) Lakshmi V, Prabahar JR, Pudi V Conference contribution Inner Product Computation In-Memory Using Distributed Arithmetic (2022) Lakshmi V, Pudi V, Reuben JR Journal article Design of in-memory parallel-prefix adders (2021) Reuben JR Journal article Carry-free Addition in Resistive RAM Array: n-bit Addition in 22 Memory Cycles (2021) Prabahar JR, Fey D Conference contribution