Sandro Pinarello

Lehrstuhl für Technische Elektronik

Adaptive Strategies for Enhancing the Efficiency of Radio Frequency Power Amplifiers in Back-Of Operation (2017) Pinarello S Thesis Impact of DC and RF non-conducting stress on nMOS reliability (2015) Cattaneo A, Pinarello S, Müller JE, Weigel R Conference contribution Frequency Response of Stress-Effects on CMOS Power Amplifiers (2014) Cattaneo A, Pinarello S, Müller JE, Weigel R Conference contribution MOSFET degradation under DC and RF Fowler-Nordheim stress (2014) Cattaneo A, Pinarello S, Müller JE, Weigel R Conference contribution Comparative Evaluation of Different Current Saving Strategies for Power Amplifiers in Back-Off Operation (2013) Pinarello S, Müller JE, Weigel R Conference contribution Analog Compensation of AM-AM and AM-PM effects for HighEfficiency Stacked-FET Power Amplifiers in 65-nm Standard CMOS (2013) Zohny A, Leuschner S, Rascher J, Pinarello S, Ußmüller T, Müller JE, Fischer G, Weigel R Conference contribution Extension of the Load-Line Theory by Investigating the Impact of the Knee-Voltage on Output-Power and Efficiency (2013) Pinarello S, Müller JE, Weigel R Conference contribution Highly linear robust RF switch with low insertion loss and high power handling capability in a 65nm CMOS technology (2012) Rascher J, Pinarello S, Müller JE, Fischer G, Weigel R Conference contribution Methods for Low Insertion Loss RF Switches with Increased Power Handling Capability in 65nm CMOS (2011) Rascher J, Pinarello S, Müller JE, Fischer G, Weigel R Conference contribution An unconventional VNA-based time-domain waveform load-pull test bench (2010) Teppati V, Pinarello S, Ferrero A, Müller JE Conference contribution, Conference Contribution