Prof. Dr.-Ing. Dietmar Fey

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM (2019) Reuben JR, Fey D Conference contribution System architecture for network-attached FPGAs in the cloud using partial reconfiguration (2019) Ringlein B, Abel F, Ditter A, Weiss B, Hagleitner C, Fey D Conference contribution Bridging the gap between high-performance, cloud and service-oriented computing (2019) Ditter A, Tielemann M, Fey D Conference contribution Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method (2019) Peschel J, Knödtel J, Pérez E, Reichenbach M, Wenger C, Fey D Conference contribution, Abstract of lecture Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications (2019) Bauer W, Holzinger P, Rachuj S, Häublein K, Reichenbach M, Fey D Conference contribution, Conference Contribution A modeling methodology for resistive RAM based on stanford-PKU model with extended multilevel capability (2019) Reuben JR, Fey D, Wenger C Journal article Reducing Hibernation Energy and Degradation in Bipolar ReRAM-Based Non-Volatile Processors (2019) Biglari M, Lieske T, Fey D Journal article Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications (2019) Häublein K, Brückner W, Vaas S, Rachuj S, Reichenbach M, Fey D Conference contribution A generic functional simulation of heterogeneous systems (2019) Rachuj S, Reichenbach M, Fey D Conference contribution Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems (2019) Bauer W, Holzinger P, Reichenbach M, Vaas S, Hartke P, Fey D Conference contribution