Programming Reconfigurable Heterogeneous Computing Clusters Using MPI with Transpilation
Ringlein B, Abel F, Ditter A, Weiss B, Hagleitner C, Fey D (2020)
Publication Type: Conference contribution
Publication year: 2020
Publisher: Institute of Electrical and Electronics Engineers Inc.
Pages Range: 1-9
Conference Proceedings Title: Proceedings of H2RC 2020: 6th International Workshop on Heterogeneous High-Performance Reconfigurable Computing, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis
ISBN: 9780738123547
DOI: 10.1109/H2RC51942.2020.00006
Abstract
With the slowdown of Moore's law and the stop of Dennard scaling, energy efficiency of compute hardware translates to compute power. Therefore, High-Performance Computing (HPC) systems tend to rely more and more on accelerators such as Field-Programmable Gate Arrays (FPGAs) to fuel high demanding workloads, like Big Data applications or Deep Neuronal Networks. These FPGAs are reconfigurable and sometimes no longer bus-attached to a CPU but directly connected to the data center network fabric as standalone nodes. This mix of CPUs and FPGAs leads to the creation of Reconfigurable Heterogeneous HPC (ReH2PC) clusters for which no established programming model exists, despite many proposals in the past. In contrast to this, the Message Passing Interface (MPI) has evolved as the de-facto standard to program classical HPC clusters, due to its high-re-usability and fast development of applications. This paper revisits the programming model of ReH2PC clusters and argues that MPI is suitable for program-ming heterogeneous clusters of FPGAs and CPUs. Our experiments with 31 FPGAs show an average speedup of 4 and a 90% reduction of power consumption compared to a cluster of CPUs. We demonstrate a one-click solution for compiling and deploying a standard MPI application on ReH2PC clusters. Our framework implements a High-Level Synthesis (HLS) library, a specific run-time environment for FPGAs and CPUs, and a transpiler that closes the semantic gap between the MPI API and FPGA designs. Our experiments with 31 FPGAs show an average speedup of 4 and a 90% reduction of power consumption compared to a cluster of CPUs
Authors with CRIS profile
Alexander Ditter
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
Dietmar Fey
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
Involved external institutions
United States (USA) (US)How to cite
APA:
Ringlein, B., Abel, F., Ditter, A., Weiss, B., Hagleitner, C., & Fey, D. (2020). Programming Reconfigurable Heterogeneous Computing Clusters Using MPI with Transpilation. In Proceedings of H2RC 2020: 6th International Workshop on Heterogeneous High-Performance Reconfigurable Computing, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis (pp. 1-9). Institute of Electrical and Electronics Engineers Inc..
MLA:
Ringlein, Burkhard, et al. "Programming Reconfigurable Heterogeneous Computing Clusters Using MPI with Transpilation." Proceedings of the 6th IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing, H2RC 2020 Institute of Electrical and Electronics Engineers Inc., 2020. 1-9.
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