Lehrstuhl für Informatik 3 (Rechnerarchitektur)

RISC-V3: A RISC-V Compatible CPU with a Data Path Based on Redundant Number Systems (2021) Reichenbach M, Knödtel J, Rachuj S, Fey D Journal article Toward Reliable Compact Modeling of Multilevel 1T-1R RRAM Devices for Neuromorphic Systems (2021) Perez-Bosch Quesada E, Romero-Zaliz R, Perez E, Kalishettyhalli Mahadevaiah M, Reuben JR, Schubert MA, Jimenez-Molinos F, et al. Journal article A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells (2021) Pechmann S, Mai T, Völkel M, Mahadevaiah MK, Perez E, Quesada EPB, Reichenbach M, et al. Journal article Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmetic (2021) Fey D, Reuben JR, Slesazeck S Conference contribution A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic (2021) Lakshmi V, Reuben JR, Pudi V Journal article The HERA Methodology: Reconfigurable Logic in General-Purpose Computing (2021) Holzinger P, Reichenbach M Journal article Simulating large neural networks embedding MLC RRAM as weight storage considering device variations (2021) Fritscher M, Knödtel J, Reiser D, Mallah M, Pechmann S, Fey D, Reichenbach M Conference contribution, Original article A Wearable Neuronal Network Processor for AFIB Detection (2021) Reichenbach M Conference contribution, Abstract of lecture Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks (2021) Fritscher M, Knödtel J, Mallah M, Pechmann S, Quesada EPB, Rizzi T, Wenger C, Reichenbach M Conference contribution, Conference Contribution Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design (2021) Vaas S, Ulbrich P, Eichler C, Wägemann P, Reichenbach M, Fey D Conference contribution, Conference Contribution