Lehrstuhl für Informatik 3 (Rechnerarchitektur)

FPGA Implementation of a Real-Time Application Based on RISC-V Cores (2025) Abdelhafez A, Ebrahimiazandaryani F, Bianconi M, Fey D Conference contribution CSD-Driven Speedup in RISC-V Processor (2025) Ebrahimiazandaryani F, Fey D Conference contribution Approximate synthesis for LUT count reduction via probabilistic error propagation (2025) Schlögl T, Keszocze O Journal article RISC-V CPU Design Using RRAM-CMOS Standard Cells (2025) Fritscher M, Uhlmann M, Ostrovskyy P, Reiser D, Chen J, Wen J, Schulze C, et al. Journal article A Novel System Simulation Framework for HBM2 FPGA Platforms (2025) Muñoz Hernandez HG, Iskandar V, Steiner L, Holzinger P, Jung M, Göhringer D, Hübner M, et al. Conference contribution Large-Scale Lattice Boltzmann Simulations on Modern HPC Systems with the waLBerla Framework (2025) Suffa P, Kemmler S, Holzer M, Köstler H, Rüde U Conference contribution, Abstract of a poster Robust quantification of spectral transitions in perturbed quantum systems (2025) Szabó Z, Gehr S, Facchi P, Yuasa K, Burgarth D, Lonigro D Journal article HyFAR: A hypervisor-based fault tolerance approach for heterogeneous automotive real-time systems (2024) Lex J, Margull U, Mader R, Fey D Journal article A flexible and fast digital twin for RRAM systems applied for training resilient neural networks (2024) Fritscher M, Singh S, Rizzi T, Baroni A, Reiser D, Mallah M, Hartmann D, et al. Other publication type Area-Efficient Digital Design Using RRAM-CMOS Standard Cells (2024) Fritscher M, Uhlmann M, Ostrovskyy P, Reiser D, Chen J, Schubert A, Schulze C, et al. Conference contribution