Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Invasive Computing - Editorial (2016) Teich J Journal article ReOrder: Runtime Datapath Generation for High-Throughput Multi-Stream Processing (2016) Becher A, Wildermann S, Mühlenthaler M, Teich J Conference contribution Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors (2016) Smirnov F, Glaß M, Reimann F, Teich J Conference contribution Hierarchical Statistical Leakage Analysis and its Application (2016) Xu Y, Teich J Journal article ActorX10: An Actor Library for X10 (2016) Roloff S, Pöppl A, Schwarzer T, Wildermann S, Baader M, Glaß M, Hannig F, Teich J Conference contribution Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures (2016) Häublein K, Reichenbach M, Reiche O, Özkan MA, Fey D, Hannig F, Teich J Conference contribution LoopInvader: A Compiler for Tightly Coupled Processor Arrays (2016) Tanase AP, Witterauf M, Sousa É, Lari V, Hannig F, Teich J Conference contribution Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016 (2016) Fanucci L, Teich J Book chapter / Article in edited volumes Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays (2016) Witterauf M, Tanase AP, Hannig F, Teich J Conference contribution Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design (2016) Wang B, Xu Y, Hasholzner R, Drewes C, Rosales R, Graf S, Falk J, et al. Conference contribution