Lehrstuhl für Informatik 3 (Rechnerarchitektur)

mMPU—A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck (2020) Talati N, Ben-Hur R, Wald N, Haj-Ali A, Prabahar JR, Kvatinsky S Book chapter / Article in edited volumes Simulating memristive systems in mixed-signal mode using commercial design tools (2019) Fritscher M, Knödtel J, Reichenbach M, Fey D Conference contribution A Hardware Inference Accelerator for Temporal Convolutional Networks (2019) Ali R, Mallah M, Leyh M, Holzinger P, Breiling M, Reichenbach M, Fey D Conference contribution, Conference Contribution A First-Principles Approach to Performance, Power, and Energy Models for Contemporary Multi- and Many-Core Processors (2019) Hofmann J Thesis A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM (2019) Reuben JR, Fey D Conference contribution System architecture for network-attached FPGAs in the cloud using partial reconfiguration (2019) Ringlein B, Abel F, Ditter A, Weiss B, Hagleitner C, Fey D Conference contribution Harnessing billions of tasks for a scalable portable hydrodynamic simulation of the merger of two stars (2019) Heller T, Lelbach BA, Huck KA, Biddiscombe J, Grubel P, Koniges AE, Kretz M, et al. Journal article Bridging the gap between high-performance, cloud and service-oriented computing (2019) Ditter A, Tielemann M, Fey D Conference contribution Automated instruction stream throughput prediction for intel and AMD microarchitectures (2019) Laukemann J, Hammer J, Hofmann J, Hager G, Wellein G Conference contribution Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method (2019) Peschel J, Knödtel J, Pérez E, Reichenbach M, Wenger C, Fey D Conference contribution, Abstract of lecture