Lehrstuhl für Informatik 3 (Rechnerarchitektur)

The HERA Methodology: Reconfigurable Logic in General-Purpose Computing (2021) Holzinger P, Reichenbach M Journal article Simulating large neural networks embedding MLC RRAM as weight storage considering device variations (2021) Fritscher M, Knödtel J, Reiser D, Mallah M, Pechmann S, Fey D, Reichenbach M Conference contribution, Original article A Wearable Neuronal Network Processor for AFIB Detection (2021) Reichenbach M Conference contribution, Abstract of lecture Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks (2021) Fritscher M, Knödtel J, Mallah M, Pechmann S, Quesada EPB, Rizzi T, Wenger C, Reichenbach M Conference contribution, Conference Contribution Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design (2021) Vaas S, Ulbrich P, Eichler C, Wägemann P, Reichenbach M, Fey D Conference contribution, Conference Contribution Transparent FPGA Acceleration with TensorFlow (2021) Pfenning S, Holzinger P, Reichenbach M Conference contribution, Conference Contribution Accelerated Addition in Resistive RAM Array Using Parallel-Friendly Majority Gates (2021) Reuben JR, Pechmann S Journal article Fast HBM Access with FPGAs: Analysis, Architectures, and Applications (2021) Holzinger P, Reiser D, Hahn T, Reichenbach M Conference contribution, Conference Contribution Programming Reconfigurable Heterogeneous Computing Clusters Using MPI with Transpilation (2020) Ringlein B, Abel F, Ditter A, Weiss B, Hagleitner C, Fey D Conference contribution A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories (2020) Knödtel J, Fritscher M, Reiser D, Fey D, Breiling M, Reichenbach M Conference contribution, Conference Contribution