Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures

Ringlein B, Abel F, Diamantopoulos D, Weiss B, Hagleitner C, Fey D (2023)

Publication Type: Journal article

Publication year: 2023

Journal

IEEE Computer Architecture Letters Institute of Electrical and Electronics Engineers

Book Volume: 22

Pages Range: 9-12

Journal Issue: 1

DOI: 10.1109/LCA.2022.3227643

Abstract

The slow-down of technology scaling combined with the exponential growth of modern machine learning and artificial intelligence models has created a demand for specialized accelerators, such as GPUs, ASICs, and field-programmable gate arrays (FPGAs). FPGAs can be reconfigured and have the potential to outperform other accelerators, while also being more energy-efficient, but are cumbersome to use with today's fractured landscape of tool flows. We propose the concept of an operation set architecture to overcome the current incompatibilities and hurdles in using DNN-to-FPGA compilers by combining existing specialized frameworks into one organic compiler that also allows the efficient and automatic re-use of existing community tools. Furthermore, we demonstrate that mixing different existing frameworks can increase the efficiency by more than an order of magnitude.

Authors with CRIS profile

Dietmar Fey Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Involved external institutions

IBM Zurich Research Laboratory

Switzerland (CH)

How to cite

APA:

Ringlein, B., Abel, F., Diamantopoulos, D., Weiss, B., Hagleitner, C., & Fey, D. (2023). Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures. IEEE Computer Architecture Letters, 22(1), 9-12. https://doi.org/10.1109/LCA.2022.3227643

MLA:

Ringlein, Burkhard, et al. "Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures." IEEE Computer Architecture Letters 22.1 (2023): 9-12.

BibTeX: Download