Prof. Dr.-Ing. Jürgen Teich

Project lead
1 of 9

Approximate Computing on FPGAs
Internally funded project

Integration and Coupling of Tightly Coupled Processor Arrays (T01)
Third Party Funds Group - Sub project
(01/03/2017 - 29/02/2020)

Cognitive Power Control for Mobile Devices
Third party funded individual grant
(01/01/2016 - 31/12/2018)

Third Party Funds Group - Sub project
(05/10/2015 - 31/12/2018)

Publications (Download BibTeX)
1 of 33

Journal article
Zaib A, Heisswolf J, Weichslgartner A, et al. (2017)
Efficient Task Spawning for Shared Memory and Message Passing in Many-core Architectures
Journal of Systems Architecture

Unpublished / Preprint
Ha S, Teich J - Ed.: Ha S, Teich J (2017)
The Handbook of Hardware/Software Codesign
Handbook of Hardware/Software Codesign

Conference contribution
Smirnov F, Glaß M, Reimann F, et al. (2017)
Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks
Proceedings of 54th ACM/EDAC/IEEE Design Automation Conference (DAC 2017)

Journal article
Aliee H, Borgonovo E, Glaß M, et al. (2017)
On the Boolean Extension of the Birnbaum Importance to Non-Coherent Systems
Reliability Engineering & System Safety

Conference contribution
Brand P, Ah Sue J, Brendel J, et al. - Ed.: ACM (2017)
Exploiting Predictability in Dynamic Network Communication for Power-Efficient Data Transmission in LTE Radio Systems
20th International Workshop on Software and Compilers for Embedded Systems (SCOPES’17)

Conference contribution
Reiche O, Kobylko C, Hannig F, et al. - Ed.: ACM (2017)
Auto-vectorization for Image Processing DSLs
Proceedings of the 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES)

Other publication type (Technical Report)
Teich J - Ed.: Friedrich-Alexander Universität Erlangen-Nürnberg (FAU), Department of CS 12, Hardware-Software-Co-Design, et al. (2017)
Run-Time Monitoring and Enforcement of Non-functional Program Properties of Invasive Programs: Terms and Definitions

Conference contribution
Pourmohseni B, Glaß M, Teich J (2017)
Automatic Operating Point Distillation for Hybrid Mapping Methodologies
Design, Automation & Test in Europe Conference & Exhibition (DATE)

Unpublished / Preprint
Schmitt C, Schmid M, Kuckuk S, et al. (2017)
Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution
Parallel Processing Letters

Journal article
Köstler H, Schmitt C, Kuckuk S, et al. (2017)
A Scala Prototype to Generate Multigrid Solver Implementations for Different Problems and Target Multi-Core Platforms
International Journal of Computational Science and Engineering

Journal article
Schwarzer T, Weichslgartner A, Glaß M, et al. (2017)
Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Conference contribution
Pirkl J, Becher A, Echavarria Gutiérrez JA, et al. (2017)
Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics
Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems

Conference contribution
Fickenscher J, Reinhart S, Bouzouraa ME, et al. - Ed.: IEEE (2017)
Convoy Tracking for ADAS on Embedded GPUs
Intelligent Vehicles Symposium (IV 2017)

Journal article
Reiche O, Özkan MA, Hannig F, et al. (2017)
Loop Parallelization Techniques for FPGA Accelerator Synthesis
Journal of Signal Processing Systems

Journal article
Khosravi F, Glaß M, Teich J (2017)
Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures
IEEE Transactions on Reliability

Journal article
Khdr H, Pagani S, Sousa É, et al. (2017)
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores
IEEE Transactions on Computers

Conference contribution
Smirnov F, Glaß M, Reimann F, et al. (2017)
Formal Timing Analysis of Non-Scheduled Traffic in Automotive Scheduled TSN Networks
Proceedings of Design, Automation and Test in Europe (DATE) 2017

Conference contribution
Aliee H, Banaiyianmofrad A, Glaß M, et al. (2017)
Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores
Proc. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'17)

Unpublished / Preprint
Salcic Z, Park H, Teich J, et al. (2017)
NoC-HMP: A Heterogeneous Multicore Processor for Embedded Systems Designed in SystemJ
Acm Transactions on Design Automation of Electronic Systems

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