Prof. Dr.-Ing. Jürgen Teich



Organisationseinheit


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Lehrstuhl für Informatik 1 (IT-Sicherheitsinfrastrukturen)


Preise / Auszeichnungen

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2016 : HiPEAC Paper Award: Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors
2015 : Best Paper Award: Reliability of Space-Grade vs. COTS SRAM-based FPGA in N-Modular Redundancy
2015 : HiPEAC Paper Award: Execution-driven Parallel Simulation of PGAS Applications on Heterogeneous Tiled Architectures
2014 : Best Paper Award: Automatic Graph-based Success Tree Construction and Analysis
2014 : HiPEAC Paper Award: A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor



Projektleitung

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SHARE: SHARE at FAU
Prof. Dr.-Ing. Jürgen Teich
(01.08.2018 - 31.07.2020)

(DFG-Schwerpunktprogramm (SPP) 2037 - Skalierbares Datenmanagement für zukünftige Hardware):
ReProVide: Anfrageoptimierung und Daten-nahe Verarbeitung auf Rekonfigurierbaren SoCs für Big-Data-Analyse
Prof. Dr.-Ing. Klaus Meyer-Wegener; Prof. Dr.-Ing. Jürgen Teich; Dr.-Ing. Stefan Wildermann
(28.08.2017 - 31.08.2021)

AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich
(13.03.2017)

(TRR 89: Invasives Rechnen):
TCPA_INT: Integration und Verbindung von eng gekoppelten Prozessorfeldern (T01)
PD Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01.03.2017 - 29.02.2020)

AdaptAC: Adaptive Approximate Computing in FPGA-basierter Bildverarbeitung
Prof. Dr.-Ing. Jürgen Teich
(24.08.2016 - 31.12.2017)


Mitarbeit in Forschungsprojekten

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HighPerMeshes: Domänenspezifische Programmierung und zielplattformbewusste Compiler-Infrastruktur für Algorithmen auf unstrukturierten Gittern
PD Dr.-Ing. Frank Hannig
(01.04.2017 - 31.03.2020)

SSI: Sustainable Smart Industry
Julian Müller; Prof. Dr. Kai-Ingo Voigt
(01.01.2017)

ESI 2: ESI-Anwendungszentrum für die digitale Automatisierung, den digitalen Sport und die Automobilsensorik der Zukunft
Prof. Dr.-Ing. Jürgen Teich
(01.01.2015 - 31.12.2018)

(SPP 1648: Software for Exascale Computing):
ExaStencils: ExaStencils - Advanced Stencil-Code Engineering
PD Dr.-Ing. Frank Hannig; Prof. Dr. Ulrich Rüde; Prof. Dr.-Ing. Jürgen Teich
(01.01.2013 - 31.12.2018)

GRK 1773: Heterogene Bildsysteme
Prof. Dr. Marc Stamminger
(01.10.2012 - 31.03.2017)


Publikationen (Download BibTeX)

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Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2019). From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. Washington DC, USA, US.
Echavarria Gutiérrez, J.A., Wildermann, S., & Teich, J. (2018). AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs. In Proceedings of 2018 International Conference on Field Programmable Technology. Naha, Okinawa, JP.
Weichslgartner, A., Wildermann, S., Gangadharan, D., Glaß, M., & Teich, J. (2018). A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs. ACM Transactions on Embedded Computing Systems.
Özkan, M.A., Pérard-Gayot, A., Membarth, R., Slusallek, P., Teich, J., & Hannig, F. (2018). A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement. In Proceedings of the Fifth International Workshop on FPGAs for Software Programmers. Dublin, IE: VDE.
Ah Sue, J., Brand, P., Brendel, J., Hasholzner, R., Falk, J., & Teich, J. (2018). A Predictive Dynamic Power Management for LTE-Advanced Mobile Devices. In IEEE (Eds.), 2018 IEEE Wireless Communications and Networking Conference (WCNC'18). Barcelona, Catalonia, Spain, ES.
Richthammer, V., Schwarzer, T., Wildermann, S., Teich, J., & Glaß, M. (2018). Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems. San Francisco, CA, US.
Schmitt, C., Hannig, F., & Teich, J. (2018). A Target Platform Description Language for Parallel Code Generation. In Workshop Proceedings of the 31st GI/ITG International Conference on Architecture of Computing Systems (ARCS) (pp. 59-66). Braunschweig, DE: Berlin: VDE VERLAG GmbH.
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2018). Automatic Kernel Fusion for Image Processing DSLs. In Proceedings of the 21th International Workshop on Software and Compilers for Embedded Systems (pp. 76-85). Sankt Goar, DE.
Smirnov, F., Reimann, F., Teich, J., Han, Z., & Glaß, M. (2018). Automatic Optimization of Redundant Message Routings in Automotive Networks. In ACM (Eds.), Proceedings of 21st International Workshop on Software and Compilers for Embedded Systems (SCOPES 2018). Sankt Goar, DE.
Smirnov, F., Reimann, F., Teich, J., & Glaß, M. (2018). Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks. (unpublished, Accepted).

Zuletzt aktualisiert 2017-18-04 um 15:02