A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI

Engelmann A, Probst F, Hetterle P, Weigel R (2024)

Publication Language: English

Publication Type: Conference contribution

Publication year: 2024

Publisher: Institute of Electrical and Electronics Engineers Inc.

Pages Range: 303-305

Conference Proceedings Title: 2023 Asia-Pacific Microwave Conference (APMC)

Event location: Taipei TW

ISBN: 978-1-6654-9419-9

DOI: 10.1109/APMC57107.2023.10439882

Abstract

This work presents a compact and energy-saving D-band frequency multiplier by 4 (quadrupler) integrated into an advanced 22 nm fully-depleted silicon-on-insulator (FDSOI) technology. The circuit consists of a multi-phase driven two-stage push-push doubler architecture achieving a conversion gain of -1 dB and covers a bandwidth of 23 GHz centered at 133 GHz. At 0.8 V supply voltage, the quadrupler attains a maximum output power of -3.4 dBm and an efficiency of 1.71% while consuming only 27 mW of DC power. A harmonic rejection greater than 26 dBc is reached over the entire bandwidth. The core cell of the circuit occupies a compact chip area of 325 × 250 μm2

Authors with CRIS profile

Andre Engelmann Lehrstuhl für Technische Elektronik (LTE) Florian Probst Lehrstuhl für Technische Elektronik (LTE) Philip Hetterle Lehrstuhl für Technische Elektronik (LTE) Robert Weigel Lehrstuhl für Technische Elektronik (LTE)

How to cite

APA:

Engelmann, A., Probst, F., Hetterle, P., & Weigel, R. (2023). A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI. In 2023 Asia-Pacific Microwave Conference (APMC) (pp. 303-305). Taipei, TW: Institute of Electrical and Electronics Engineers Inc..

MLA:

Engelmann, Andre, et al. "A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI." Proceedings of the 31st Asia-Pacific Microwave Conference, APMC 2023, Taipei Institute of Electrical and Electronics Engineers Inc., 2023. 303-305.

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