A Compact Energy-Saving D-Band Frequency Quadrupler with -1 dB Conversion Gain in 22 nm FDSOI - Engelmann, Andre; Probst, Florian; Hetterle, Philip; Weigel, Robert (2023 Asia-Pacific Microwave Conference (APMC), 2023)
This work presents a compact and energy-saving D-band frequency multiplier by 4 (quadrupler) integrated into an advanced 22 nm fully-depleted silicon-on-insulator (FDSOI) technology. The circuit consists of a multi-phase driven two-stage push-push doubler architecture achieving a conversion gain of -1 dB and covers a bandwidth of 23 GHz centered at 133 GHz. At 0.8 V supply voltage, the quadrupler attains a maximum output power of -3.4 dBm and an efficiency of 1.71% while consuming only 27 mW of DC power. A harmonic rejection greater than 26 dBc is reached over the entire bandwidth. The core cell of the circuit occupies a compact chip area of 325 × 250 μm2
CRIS-Team Scopus Importer:2024-12-16
Keywords: CMOS; D-band; FDSOI; frequency multiplier; MMIC; quadrupler; signal generation