Understanding HPC benchmark performance on intel broadwell and cascade lake processors

Alappat C, Hofmann J, Hager G, Fehske H, Bishop AR, Wellein G (2020)

Publication Type: Conference contribution

Publication year: 2020

Journal

Lecture Notes in Computer Science Springer Verlag

Publisher: Springer

Book Volume: 12151 LNCS

Pages Range: 412-433

Conference Proceedings Title: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Event location: Frankfurt DE

ISBN: 9783030507428

DOI: 10.1007/978-3-030-50743-5_21

Abstract

Hardware platforms in high performance computing are constantly getting more complex to handle even when considering multicore CPUs alone. Numerous features and configuration options in the hardware and the software environment that are relevant for performance are not even known to most application users or developers. Microbenchmarks, i.e., simple codes that fathom a particular aspect of the hardware, can help to shed light on such issues, but only if they are well understood and if the results can be reconciled with known facts or performance models. The insight gained from microbenchmarks may then be applied to real applications for performance analysis or optimization. In this paper we investigate two modern Intel x86 server CPU architectures in depth: Broadwell EP and Cascade Lake SP. We highlight relevant hardware configuration settings that can have a decisive impact on code performance and show how to properly measure on-chip and off-chip data transfer bandwidths. The new victim L3 cache of Cascade Lake and its advanced replacement policy receive due attention. Finally we use DGEMM, sparse matrix-vector multiplication, and the HPCG benchmark to make a connection to relevant application scenarios.

Authors with CRIS profile

Christie Alappat Regionales Rechenzentrum Erlangen (RRZE) Johannes Hofmann Lehrstuhl für Informatik 3 (Rechnerarchitektur) Georg Hager Regionales Rechenzentrum Erlangen (RRZE) Gerhard Wellein Professur für Höchstleistungsrechnen

Involved external institutions

Los Alamos National Laboratory US United States (USA) (US) Universität Greifswald DE Germany (DE)

How to cite

APA:

Alappat, C., Hofmann, J., Hager, G., Fehske, H., Bishop, A.R., & Wellein, G. (2020). Understanding HPC benchmark performance on intel broadwell and cascade lake processors. In Ponnuswamy Sadayappan, Bradford L. Chamberlain, Guido Juckeland, Hatem Ltaief (Eds.), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (pp. 412-433). Frankfurt, DE: Springer.

MLA:

Alappat, Christie, et al. "Understanding HPC benchmark performance on intel broadwell and cascade lake processors." Proceedings of the 35th International Conference on High Performance Computing, ISC High Performance 2020, Frankfurt Ed. Ponnuswamy Sadayappan, Bradford L. Chamberlain, Guido Juckeland, Hatem Ltaief, Springer, 2020. 412-433.

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