Synthesis of Approximate Coders for On-Chip Interconnects Using Reversible Logic
Wille R, Keszocze O, Hillmich S, Walter M, Garcia-Ortiz A (2016)
Publication Status: Published
Publication Type: Conference contribution, Conference Contribution
Publication year: 2016
Publisher: Institute of Electrical and Electronics Engineers Inc.
Pages Range: 1140-1143
Article Number: 7459481
ISBN: 9783981537062
URI: https://www.scopus.com/record/display.uri?eid=2-s2.0-84973635861∨igin=inward
Authors with CRIS profile
Involved external institutions
Universität Bremen
Germany (DE)
Deutsches Forschungszentrum für Künstliche Intelligenz (DFKI) GmbH
Germany (DE)
Johannes Kepler Universität (JKU) Linz
Austria (AT)
Germany (DE)
Deutsches Forschungszentrum für Künstliche Intelligenz (DFKI) GmbH
Germany (DE)
Johannes Kepler Universität (JKU) Linz
Austria (AT)
How to cite
APA:
Wille, R., Keszocze, O., Hillmich, S., Walter, M., & Garcia-Ortiz, A. (2016). Synthesis of Approximate Coders for On-Chip Interconnects Using Reversible Logic. In Proceedings of the 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 (pp. 1140-1143). Institute of Electrical and Electronics Engineers Inc..
MLA:
Wille, Robert, et al. "Synthesis of Approximate Coders for On-Chip Interconnects Using Reversible Logic." Proceedings of the 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 Institute of Electrical and Electronics Engineers Inc., 2016. 1140-1143.
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