Implanted bottom gate for epitaxial graphene on silicon carbide

Waldmann D, Jobst J, Fromm F, Speck F, Seyller T, Krieger M, Weber HB (2012)

Publication Type: Journal article

Publication year: 2012


Publisher: Institute of Physics: Hybrid Open Access

Book Volume: 45

Pages Range: 154006

DOI: 10.1088/0022-3727/45/15/154006


We present a technique to tune the charge density of epitaxial graphene via an electrostatic gate that is buried in the silicon carbide substrate. The result is a device in which graphene remains accessible for further manipulation or investigation. Via nitrogen or phosphor implantation into a silicon carbide wafer and subsequent graphene growth, devices can routinely be fabricated using standard semiconductor technology. We have optimized samples for room temperature as well as for cryogenic temperature operation. Depending on implantation dose and temperature we operate in two gating regimes. In the first, the gating mechanism is similar to a MOSFET, the second is based on a tuned space charge region of the silicon carbide semiconductor. We present a detailed model that describes the two gating regimes and the transition in between. © 2012 IOP Publishing Ltd.

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Waldmann, D., Jobst, J., Fromm, F., Speck, F., Seyller, T., Krieger, M., & Weber, H.B. (2012). Implanted bottom gate for epitaxial graphene on silicon carbide. Journal of Physics D-Applied Physics, 45, 154006.


Waldmann, Daniel, et al. "Implanted bottom gate for epitaxial graphene on silicon carbide." Journal of Physics D-Applied Physics 45 (2012): 154006.

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