Efficient multicore-aware parallelization strategies for iterative stencil computations

Eitzinger J, Wellein G, Hager G (2011)

Publication Type: Journal article

Publication year: 2011


Publisher: Elsevier BV

Book Volume: 2

Pages Range: 130–137

Journal Issue: 2

URI: http://www.sciencedirect.com/science/article/pii/S1877750311000172

DOI: 10.1016/j.jocs.2011.01.010


Stencil computations consume a major part of runtime in many scientific simulation codes. As prototypes for this class of algorithms we consider the iterative Jacobi and Gauss-Seidel smoothers and aim at highly efficient parallel implementations for cache-based multicore architectures. Temporal cache blocking is a known advanced optimization technique, which can reduce the pressure on the memory bus significantly. We apply and refine this optimization for a recently presented temporal blocking strategy designed to explicitly utilize multicore characteristics. Especially for the case of Gauss-Seidel smoothers we show that simultaneous multi-threading (SMT) can yield substantial performance improvements for our optimized algorithm on some architectures. © 2011 Elsevier B.V.

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Eitzinger, J., Wellein, G., & Hager, G. (2011). Efficient multicore-aware parallelization strategies for iterative stencil computations. Journal of Computational Science, 2(2), 130–137. https://doi.org/10.1016/j.jocs.2011.01.010


Eitzinger, Jan, Gerhard Wellein, and Georg Hager. "Efficient multicore-aware parallelization strategies for iterative stencil computations." Journal of Computational Science 2.2 (2011): 130–137.

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