Optimization methodologies for reconfiguration management on reconfigurable hardware nodes (ReCoNodes)

Third Party Funds Group - Sub project

Acronym: ReCoNodes

Start date : 01.06.2003

End date : 31.05.2009

Website: http://www.reconodes.de

Overview

Publications

(53)

ReCoNodes-optimization methods for module scheduling and placement on reconfigurable hardware devices (2010) Ahmadinia A, Angermeier J, Fekete SP, Kamphans T, Koch D, Majer M, Schweer N, et al. Authored book, other Erlangen slot machine: An FPGA-based dynamically reconfigurable computing platform (2010) Angermeier J, Bobda C, Majer M, Teich J Authored book, other Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications (2010) Platzner M, Teich J, Wehn N Authored book Optimal Placement-aware Trace-based Scheduling of Hardware Reconfigurations for FPGA Accelerators (2009) Sim JE, Wong WF, Teich J Conference contribution Minimizing Internal Fragmentation by Fine-grained Two-dimensional Module Placement for Runtime Reconfigurable Systems (2009) Koch D, Beckhoff C, Teich J Conference contribution A Communication Architecture for Complex Runtime Reconfigurable Systems and its Implementation on Spartan-3 FPGAs (2009) Koch D, Beckhoff C, Teich J Conference contribution Hardware decompression techniques for FPGA-based embedded systems (2009) Teich J, Beckhoff C, Koch D Journal article, Original article Efficient reconfigurable on-chip buses for fpgas (2008) Haubelt C, Koch D, Teich J Conference contribution, Conference Contribution No-Break Dynamic Defragmentation of Reconfigurable Devices (2008) Fekete SP, Kamphans T, Schweer N, Tessars C, Van Der Veen JC, Angermeier J, Koch D, Teich J Conference contribution Netlist-Level IP Protection by Watermarking for LUT-Based FPGAs (2008) Schmid M, Ziener D, Teich J Conference contribution

‹ 1 2 3 ... 6 ›