A Domain-Specific Language and GPU Target Code Generator for Image Processing Applications (HIPAcc)

An Efficient Approach for Image Border Handling on GPUs via Iteration Space Partitioning (2021) Qiao B, Teich J, Hannig F Conference contribution, Original article The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL (2020) Qiao B, Özkan MA, Teich J, Hannig F Conference contribution, Original article Unveiling Kernel Concurrency in Multiresolution Filters on GPUs with an Image Processing DSL (2020) Qiao B, Reiche O, Teich J, Hannig F Conference contribution, Original article DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs (2019) Fickenscher J, Hannig F, Teich J Conference contribution, Original article From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization (2019) Qiao B, Reiche O, Hannig F, Teich J Conference contribution, Original article Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards (2019) Membarth R, Dutta H, Hannig F, Teich J Book chapter / Article in edited volumes Synthesizing High-Performance Image Processing Applications with Hipacc (2019) Özkan MA, Reiche O, Qiao B, Membarth R, Teich J, Hannig F Conference contribution, Conference Contribution Automatic Kernel Fusion for Image Processing DSLs (2018) Qiao B, Reiche O, Hannig F, Teich J Conference contribution, Original article Special Issue on Heterogeneous Real-Time Image Processing (2018) Fey D, Hannig F Journal article, Editorial Loop Parallelization Techniques for FPGA Accelerator Synthesis (2018) Reiche O, Özkan MA, Hannig F, Teich J, Schmid M Journal article