Sebastian Rachuj

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Investigating SAMV Regarding its Suitability For FPGAs (2022) Giahi F, Rachuj S, Fey D Conference contribution Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning (2022) Fricke F, Scharoba S, Rachuj S, Konopik A, Kluge F, Hofstetter G, Reichenbach M Book chapter / Article in edited volumes Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? (2022) Knodtel J, Rachuj S, Reichenbach M Conference contribution Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning (2022) Fricke F, Scharoba S, Rachuj S, Konopik A, Kluge F, Hofstetter G, Reichenbach M Conference contribution RISC-V3: A RISC-V Compatible CPU with a Data Path Based on Redundant Number Systems (2021) Reichenbach M, Knödtel J, Rachuj S, Fey D Journal article Impact of Performance Estimation on Fast Processor Simulators (2020) Rachuj S, Fey D, Reichenbach M Conference contribution, Conference Contribution Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications (2019) Bauer W, Holzinger P, Rachuj S, Häublein K, Reichenbach M, Fey D Conference contribution, Conference Contribution Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications (2019) Häublein K, Brückner W, Vaas S, Rachuj S, Reichenbach M, Fey D Conference contribution A generic functional simulation of heterogeneous systems (2019) Rachuj S, Reichenbach M, Fey D Conference contribution Autonomous Driving in the Curriculum of Computer Architecture (2018) Rachuj S, Reichenbach M, Vaas S, Fey D Conference contribution, Conference Contribution