Franz-Josef Streit

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Techniques to Secure HW/SW-Programmable SoC Architectures for Edge Computing (2022) Streit FJ Thesis Design and Evaluation of a Tunable PUF Architecture for FPGAs (2021) Streit FJ, Krüger P, Becher A, Wildermann S, Teich J Conference contribution, Abstract of lecture Design and Evaluation of a Tunable PUF Architecture for FPGAs (2021) Streit FJ, Krüger P, Becher A, Wildermann S, Teich J Journal article, Editorial CHOICE – A Tunable PUF-Design for FPGAs (2021) Streit FJ, Krüger P, Becher A, Schlumberger J, Wildermann S, Teich J Conference contribution, Conference Contribution Providing Tamper-Secure SoC Updates through Reconfigurable Hardware (2021) Streit FJ, Wildermann S, Pschyklenk M, Teich J Conference contribution, Conference Contribution Secure Boot from Non-Volatile Memory for Programmable SoC-Architectures (2020) Streit FJ, Fritz F, Becher A, Wildermann S, Werner S, Schmidt-Korth M, Pschyklenk M, Teich J Conference contribution, Conference Contribution Data acquisition and control at the edge: a hardware/software-reconfigurable approach (2020) Streit FJ, Wituschek S, Pschyklenk M, Becher A, Lechner M, Wildermann S, Pitz I, et al. Journal article, Editorial Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs (2019) Plagwitz P, Streit FJ, Becher A, Wildermann S, Teich J Conference contribution, Conference Contribution Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs (2018) Streit FJ, Letras M, Wildermann S, Hackenberg B, Falk J, Becher A, Teich J Conference contribution, Conference Contribution High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems (2017) Streit FJ, Letras M, Schid M, Falk J, Wildermann S, Teich J Conference contribution, Conference Contribution