CHOICE – A Tunable PUF-Design for FPGAs

Streit FJ, Krüger P, Becher A, Schlumberger J, Wildermann S, Teich J (2021)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2021

Conference Proceedings Title: IEEE Proceedings of the 31th International Conference on Field Programmable Logic and Applications

Event location: Dresden, Germany

ISBN: 978-1-6654-3759-2

DOI: 10.1109/FPL53798.2021.00015


FPGA-based Physical Unclonable Functions (PUFs) have emerged as a viable alternative to permanent key storage by turning inaccuracies during the manufacturing process of a chip into a unique, FPGA-intrinsic secret. However, many fixed PUF designs may suffer from unsatisfactory statistical properties in terms of uniqueness, uniformity, and robustness. Moreover, a PUF signature may alter over time due to aging
or changing operating conditions, rendering a PUF insecure in the worst case. As a remedy, we propose CHOICE, a novel class of FPGA-based PUF designs with tunable uniqueness and reliability characteristics. By the use of addressable shift registers available on an FPGA, we show that a wide configuration space
for adjusting a device-specific PUF response is obtained without any sacrifice of randomness. In particular, we demonstrate the concept of address-tunable propagation delays, whereby we are able to increase or decrease the probability of obtaining ’1’s in the PUF response. Experimental evaluations on a group of six 28 nm Xilinx Artix-7 FPGAs show that CHOICE PUFs provide a large range of configurations to allow a fine-tuning to an
average uniqueness between 49% and 51%, while simultaneously achieving bit error rates below 1.5%, thus outperforming state-of-the-art PUF designs. Moreover, with only a single FPGA slice per PUF bit, CHOICE is one of the smallest PUF designs currently available for FPGAs.

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Streit, F.-J., Krüger, P., Becher, A., Schlumberger, J., Wildermann, S., & Teich, J. (2021). CHOICE – A Tunable PUF-Design for FPGAs. In IEEE Proceedings of the 31th International Conference on Field Programmable Logic and Applications. Dresden, Germany.


Streit, Franz-Josef, et al. "CHOICE – A Tunable PUF-Design for FPGAs." Proceedings of the International Conference on Field-Programmable Logic and Applications (FPL), Dresden, Germany 2021.

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