Lehrstuhl für Informatik 3 (Rechnerarchitektur)

A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification (2022) Reiser D, Reichel P, Pechmann S, Mallah M, Oppelt MP, Hagelauer A, Breiling M, et al. Journal article Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? (2022) Knodtel J, Rachuj S, Reichenbach M Conference contribution Majority Logic Based In-Memory Comparator (2022) Lakshmi V, Prabahar JR, Pudi V Conference contribution EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis (2022) Schwenger L, Holzinger P, Fey D, Hernandez HGM, Reichenbach M Conference contribution Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning (2022) Fricke F, Scharoba S, Rachuj S, Konopik A, Kluge F, Hofstetter G, Reichenbach M Conference contribution Inner Product Computation In-Memory Using Distributed Arithmetic (2022) Lakshmi V, Pudi V, Reuben JR Journal article Accelerating Veins Simulations by Utilizing Task Parallelism on a HPC Cluster Without Introducing Major Inaccuracies (2022) Fritscher M, Dengler G, Bleibaum C, Niebisch M, German R Conference contribution, Conference Contribution Fault Tolerance in Heterogeneous Automotive Real-time Systems (2022) Lex J, Margull U, Fey D, Mader R Conference contribution TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms (2021) Hosseinzadeh S, Biglari M, Fey D Journal article Design of in-memory parallel-prefix adders (2021) Reuben JR Journal article