Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits (2016) Fey D, Reichenbach M, Söll C, Biglari M, Röber J, Weigel R Conference contribution, Original article Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks (2016) Häublein K, Hartmann C, Reichenbach M, Fey D Conference contribution An ECM-based Energy-efficiency Optimization Approach for Bandwidth-limited Streaming Kernels on Recent Intel Xeon Processors (2016) Hofmann J, Fey D Conference contribution Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks (2016) Hofmann J, Fey D, Eitzinger J, Hager G, Wellein G Conference contribution C++ Classes and Templates for OpenCL Kernels with PATOS (2016) Richter-Gottfried F, Kreutzer P, Ditter A, Schneider M, Fey D Conference contribution, Conference Contribution A flexible mixed-signal image processing pipeline using 3D chip stacks (2016) Shi L, Söll C, Pfundt B, Bänisch A, Reichenbach M, Seiler J, Ussmueller T, Weigel R Journal article, Original article Synthesis and Optimization of Image Processing Accelerators using Domain Knowledge (2015) Reiche O, Häublein K, Reichenbach M, Schmid M, Hannig F, Teich J, Fey D Journal article Estimation of Non-functional Properties for Embedded Hardware with Application to Image Processing (2015) Herglotz C, Seiler J, Kaup A, Hendricks A, Reichenbach M, Fey D Conference contribution, Conference Contribution Novel Image Processing Architecture for 3D Integrated Circuits (2015) Pfundt B, Reichenbach M, Fey D, Söll C Conference contribution Execution-Cache-Memory Performance Model: Introduction and Validation (2015) Hofmann J, Eitzinger J, Fey D Other publication type