Lehrstuhl für Informatik 3 (Rechnerarchitektur)

High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States (2018) Biglari M, Lieske T, Fey D Conference contribution, Original article Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs (2018) Lieske T, Biglari M, Fey D Conference contribution, Original article Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor (2018) Rachuj S, Bauer W, Fey D Conference contribution Case Study on Memristor-Based Multilevel Memories (2018) Söll C, Reichenbach M, Röber J, Hagelauer AM, Weigel R, Fey D Journal article, Original article Modeling the Energy Consumption of the HEVC Decoding Process (2018) Herglotz C, Springer D, Reichenbach M, Stabernack B, Kaup A Journal article High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems (2017) Streit FJ, Letras M, Schid M, Falk J, Wildermann S, Teich J Conference contribution, Conference Contribution Towards Virtual Hardware Prototyping for Generated Geometric Multigrid Solvers (2017) Kuckuk S, Leitenmaier L, Schmitt C, Schönwetter D, Köstler H, Fey D Other publication type The Best of Both: High-performance and Deterministic Real-Time Executive by Application-Specific Multi-Core SoCs (2017) Vaas S, Ulbrich P, Reichenbach M, Fey D Conference contribution, Original article Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors (2017) Hofmann J, Fey D, Riedmann M, Eitzinger J, Hager G, Wellein G Journal article A Non-Volatile Flip-Flop Using Memristive Voltage Divider (2017) Biglari M, Fey D Conference contribution, Abstract of a poster