Power Cycle Testing at Low Temperature Swings – Evaluating the Stability of SAC- and SnSb-based Chip Solder Layers

Schmidt R, Kaesbauer M, Sippel M, Dreher P (2020)

Publication Language: English

Publication Type: Conference contribution

Publication year: 2020

Publisher: VDE Verlag GmbH

City/Town: Berlin and Offenbach

Pages Range: 196--201

Conference Proceedings Title: Proceedings of the 11th International Conference on Integrated Power Electronics Systems (CIPS 2020)

ISBN: 978-3-8007-5225-6

Authors with CRIS profile

Marcel Sippel Lehrstuhl für Fertigungsautomatisierung und Produktionssystematik

Involved external institutions

Siemens AG DE Germany (DE)

How to cite

APA:

Schmidt, R., Kaesbauer, M., Sippel, M., & Dreher, P. (2020). Power Cycle Testing at Low Temperature Swings – Evaluating the Stability of SAC- and SnSb-based Chip Solder Layers. In Proceedings of the 11th International Conference on Integrated Power Electronics Systems (CIPS 2020) (pp. 196--201). Berlin and Offenbach: VDE Verlag GmbH.

MLA:

Schmidt, Ralf, et al. "Power Cycle Testing at Low Temperature Swings – Evaluating the Stability of SAC- and SnSb-based Chip Solder Layers." Proceedings of the 11th International Conference on Integrated Power Electronics Systems (CIPS 2020) Berlin and Offenbach: VDE Verlag GmbH, 2020. 196--201.

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