Defect structures at the silicon/3C-SiC interface
Hens P, Müller J, Spiecker E, Wellmann P (2012)
Publication Language: English
Publication Status: Published
Publication Type: Journal article, Original article
Publication year: 2012
Journal
Book Volume: 717-720
Pages Range: 423-426
Event location: Cleveland, OH
ISBN: 9783037854198
DOI: 10.4028/www.scientific.net/MSF.717-720.423
Abstract
In all heteroepitaxial systems the interface between substrate and layer is a crucial point. In this work SEM and TEM studies on the interface between silicon substrate and cubic silicon carbide (3C-SiC) layers obtained by chemical vapor deposition (CVD) are presented. A clear connection between process parameters, like the design of substrate cleaning, and the heating ramp, and resulting defect structures at the substrate-layer interface could be found. Whereas the process step of etching in hot hydrogen for oxide removal is crucial for avoiding the generation of closed voids of type 2, the design of the temperature ramp-up to growth temperature during carbonization influences the interface roughness. Here a fast ramp helps to obtain a flat interface. © (2012) Trans Tech Publications.
Authors with CRIS profile
Julian Müller
Lehrstuhl für Werkstoffwissenschaften (Mikro- und Nanostrukturforschung)
Erdmann Spiecker
Lehrstuhl für Werkstoffwissenschaften (Mikro- und Nanostrukturforschung)
Peter Wellmann
Professur für Werkstoffwissenschaften (Werkstoffe der Elektrotechnik)
Additional Organisation(s)
Involved external institutions
Sweden (SE)How to cite
APA:
Hens, P., Müller, J., Spiecker, E., & Wellmann, P. (2012). Defect structures at the silicon/3C-SiC interface. Materials Science Forum, 717-720, 423-426. https://doi.org/10.4028/www.scientific.net/MSF.717-720.423
MLA:
Hens, Philip, et al. "Defect structures at the silicon/3C-SiC interface." Materials Science Forum 717-720 (2012): 423-426.
BibTeX: Download