A programmable ternary CPU using hybrid CMOS/memristor circuits

Beitrag in einer Fachzeitschrift
(Originalarbeit)


Details zur Publikation

Autor(en): Wust D, Fey D, Knödtel J
Zeitschrift: International Journal of Parallel, Emergent and Distributed Systems
Jahr der Veröffentlichung: 2018
Seitenbereich: 1--21
ISSN: 1744-5760
eISSN: 1744-5779
Sprache: Englisch


Abstract

The carry propagation of arithmetic operations is one of the major shortcomings of common binary number encodings as the two’s complement. Signed-digit arithmetic allows the addition of two numbers without carry propagation and in asymptotically constant time in dependence of the word length, while at the same time requiring a digit representation with more than two states. With the advent of memristors, it has become possible to store multiple states within a single memory cell. This paper proposes an implementation of a general purpose CPU using signed-digit arithmetic by exploiting memristors in order to implement multi-value registers. The proposed model of the CPU is evaluated by the execution of various image processing algorithms. It is shown that a break-even point exists at which signed-digit algorithms outperform conventional binary arithmetic operations. Furthermore, simulation results prove that the memristor device lends itself to store signed-digit data efficiently.


FAU-Autoren / FAU-Herausgeber

Fey, Dietmar Prof. Dr.-Ing.
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
Wust, Daniel
Lehrstuhl für Informatik 3 (Rechnerarchitektur)


Zitierweisen

APA:
Wust, D., Fey, D., & Knödtel, J. (2018). A programmable ternary CPU using hybrid CMOS/memristor circuits. International Journal of Parallel, Emergent and Distributed Systems, 1--21. https://dx.doi.org/10.1080/17445760.2017.1422251

MLA:
Wust, Daniel, Dietmar Fey, and Johannes Knödtel. "A programmable ternary CPU using hybrid CMOS/memristor circuits." International Journal of Parallel, Emergent and Distributed Systems (2018): 1--21.

BibTeX: 

Zuletzt aktualisiert 2019-03-01 um 13:10