Data access characteristics and optimizations for SUN ULTRASPARC T2 AND T2+ systems

Beitrag in einer Fachzeitschrift


Details zur Publikation

Autor(en): Hager G, Zeiser T, Wellein G
Zeitschrift: Parallel Processing Letters
Verlag: World Scientific Publishing Co
Jahr der Veröffentlichung: 2008
Band: 18
Heftnummer: 4
Seitenbereich: 471-490
ISSN: 0129-6264
Sprache: Englisch


Abstract


Processor and system architectures that feature multiple memory controllers and/or ccNUMA characteristics are prone to show bottlenecks and erratic performance numbers on scientific codes. Although cache thrashing, aliasing conflicts, and ccNUMA locality and contention problems are well known for many types of systems, they take on peculiar forms on the new Sun UltraSPARC T2 and T2+ processors, which we use here as prototypical multi-core designs. We analyze performance patterns in low-level and application benchmarks and put some emphasis on a comparison of performance features between T2 and its successor. Furthermore we show ways to circumvent bottlenecks by careful data layout, placement and padding. © 2008 World Scientific Publishing Company.



FAU-Autoren / FAU-Herausgeber

Hager, Georg Dr.
Regionales Rechenzentrum Erlangen (RRZE)
Wellein, Gerhard Prof. Dr.
Professur für Höchstleistungsrechnen
Zeiser, Thomas Dr.
Regionales Rechenzentrum Erlangen (RRZE)


Zitierweisen

APA:
Hager, G., Zeiser, T., & Wellein, G. (2008). Data access characteristics and optimizations for SUN ULTRASPARC T2 AND T2+ systems. Parallel Processing Letters, 18(4), 471-490. https://dx.doi.org/10.1142/S0129626408003521

MLA:
Hager, Georg, Thomas Zeiser, and Gerhard Wellein. "Data access characteristics and optimizations for SUN ULTRASPARC T2 AND T2+ systems." Parallel Processing Letters 18.4 (2008): 471-490.

BibTeX: 

Zuletzt aktualisiert 2018-09-08 um 14:38