A Domain-Specific Language and GPU Target Code Generator for Image Processing Applications

Internally funded project


Project Details

Project leader:
PD Dr.-Ing. Frank Hannig

Project members:
Richard Membarth
Oliver Reiche
Mehmet Akif Özkan

Contributing FAU Organisations:
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Acronym: HIPAcc
Start date: 01/01/2009


Abstract (technical / expert description):


HIPAcc allows to design image processing kernels and algorithms in a domain-specific language (DSL). From this high-level description, low-level target code for GPU accelerators is generated using source-to-source translation. As back ends, the framework supports CUDA, OpenCL, and Renderscript. The framework runs on GNU/Linux and Mac OS X and is licensed under the Simplified BSD License.



Publications

Fickenscher, J., Hannig, F., & Teich, J. (2019). DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs. In Proceedings of the ARCS 2019 - 32nd International Conference on Architecture of Computing Systems. Copenhagen, DK.
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2018). Automatic Kernel Fusion for Image Processing DSLs. In Proceedings of the 21th International Workshop on Software and Compilers for Embedded Systems (pp. 76-85). Sankt Goar, DE.
Reiche, O., Özkan, M.A., Hannig, F., Teich, J., & Schmid, M. (2018). Loop Parallelization Techniques for FPGA Accelerator Synthesis. Journal of Signal Processing Systems, 90(1), 3-27. https://dx.doi.org/10.1007/s11265-017-1229-7
Özkan, M.A., Reiche, O., Hannig, F., & Teich, J. (2017). A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis. In Proceedings of the Fourth International Workshop on FPGAs for Software Programmers (FSP). Ghent, BE: VDE.
Reiche, O., Kobylko, C., Hannig, F., & Teich, J. (2017). Auto-vectorization for Image Processing DSLs. In ACM (Eds.), Proceedings of the 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES) (pp. 21 - 30). Barcelona, ES.
Reiche, O., Özkan, M.A., Membarth, R., Teich, J., & Hannig, F. (2017). Generating FPGA-based Image Processing Accelerators with Hipacc. In IEEE (Eds.), Proceedings of the International Conference On Computer Aided Design (pp. 1026-1033). Irvine, US: IEEE.

Last updated on 2018-06-11 at 17:45