Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Address:
Martensstraße 3
91058 Erlangen


Related Project(s)


DIME: DIME - Datenlokale Iterationsverfahren zur effizienten Lösung partieller Differentialgleichungen
Arndt Bode; Prof. Dr. Ulrich Rüde
(01/06/2000 - 30/04/2006)



Publications (Download BibTeX)

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Bauer, W., Holzinger, P., Reichenbach, M., Vaas, S., Hartke, P., & Fey, D. (2019). Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. In Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Eds.), Euro-Par 2018: Parallel Processing Workshops (pp. 733--744). Cham: Springer International Publishing.
Knödtel, J., Schwabe, W., Lieske, T., Reichenbach, M., & Fey, D. (2018). A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. In 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) (pp. 46-53-53). Platja D’Aro, ES.
Rachuj, S., Reichenbach, M., Vaas, S., & Fey, D. (2018). Autonomous Driving in the Curriculum of Computer Architecture. In Proceedings of the 12th European Workshop on Microelectronics Education. Braunschweig, DE.
Schwarzmeier, C., Ditter, A., & Fey, D. (2018, September). Distributed Asynchronous Jacobi Methods. Poster presentation at CoSaS 2018 International Symposium on Computational Science at Scale, Erlangen.
Holzinger, P., Reichenbach, M., & Fey, D. (2018). A New Generic HLS Approach for Heterogeneous Computing: On the Feasibility of High-Level Synthesis in HSA-Compatible Systems. In Mudge Trevor, Pnevmatikatos Dionisios N. (Eds.), SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (pp. 18-27). Pythagorion, Samos Island, GR: New York, NY, USA: ACM.
Rachuj, S., Herglotz, C., Reichenbach, M., Kaup, A., & Fey, D. (2018). A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. In Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck (Eds.), 31st International Conference on Architecture of Computing Systems, ARCS 2018 (pp. 85-96). Braunschweig: Springer.
Fey, D., & Hannig, F. (2018). Special Issue on Heterogeneous Real-Time Image Processing. Journal of Real-Time Image Processing, 14(3), 513-515. https://dx.doi.org/10.1007/s11554-018-0763-2
Wust, D., Fey, D., & Knödtel, J. (2018). A programmable ternary CPU using hybrid CMOS/memristor circuits. International Journal of Parallel, Emergent and Distributed Systems, 1--21. https://dx.doi.org/10.1080/17445760.2017.1422251
Rachuj, S., Bauer, W., & Fey, D. (2018). Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor. In AmE 2018 - Automotive meets Electronics (pp. 44-48). Dortmund.
Reichenbach, M., Holzinger, P., Häublein, K., Lieske, T., Blinzer, P., & Fey, D. (2018). Heterogeneous Computing Utilizing FPGAs. Journal of Signal Processing Systems. https://dx.doi.org/10.1007/s11265-018-1382-7
Söll, C., Reichenbach, M., Röber, J., Hagelauer, A., Weigel, R., & Fey, D. (2018). Case Study on Memristor-Based Multilevel Memories. International Journal of Circuit Theory and Applications, 46(1), 99-112. https://dx.doi.org/10.1002/cta.2379
Laukemann, J., Hammer, J., Hofmann, J., Hager, G., & Wellein, G. (2018). Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. In 2018 IEEE/ACM Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS) (pp. 121-131). Dallas, TX, US: IEEE.
Diehl, P., Seshadri, M., Heller, T., & Kaiser, H. (2018). Integration of CUDA Processing within the C plus plus library for parallelism and concurrency (HPX). In PROCEEDINGS OF 2018 IEEE/ACM 4TH INTERNATIONAL WORKSHOP ON EXTREME SCALE PROGRAMMING MODELS AND MIDDLEWARE (ESPM2 2018) (pp. 19-28). Dallas, TX, US: NEW YORK: IEEE.
Reichenbach, M., Liebischer, L., Vaas, S., & Fey, D. (2018). Comparison of Lane Detection Algorithms for ADAS using Embedded Hardware Architectures. In Proceedings of 2018 Conference on Design and Architectures for Signal and Image Processing (DASIP) (pp. 1-6). Porto, PT: Porto: IEEE.
Hofmann, J., Hager, G., & Fey, D. (2018). On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors. In High Performance Computing: 33rd International Conference, ISC High Performance 2018 (pp. 22-43). Frankfurt: Cham: Springer International Publishing.
Vaas, S., Ulbrich, P., Reichenbach, M., & Fey, D. (2018). Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. Journal of Signal Processing Systems.
Lieske, T., Biglari, M., & Fey, D. (2018). Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs. In Proceedings of the International Symposium on Memory Systems (pp. 259-268). Alexandria, Virginia, US: New York, NY, USA: ACM.
Herglotz, C., Springer, D., Reichenbach, M., Stabernack, B., & Kaup, A. (2018). Modeling the Energy Consumption of the HEVC Decoding Process. IEEE Transactions on Circuits and Systems For Video Technology, 28, 217-229. https://dx.doi.org/10.1109/TCSVT.2016.2598705
Biglari, M., Lieske, T., & Fey, D. (2018). High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States. In Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures (pp. 19 - 24). Athens, Greece: New York, NY, USA: ACM.
Lieske, T., Uhring, W., Dumas, N., Skilitsi, A.I., Leonard, J., & Fey, D. (2018). Embedded Fluorescence Lifetime Determination for High-Throughput, Low-Photon-Number Applications. Journal of Signal Processing Systems. https://dx.doi.org/10.1007/s11265-018-1372-9

Last updated on 2019-24-04 at 10:22