Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Cauerstraße 11
91058 Erlangen

Subordinate Organisational Units

Juniorprofessur für Dependable Embedded Systems
Professur für Informatik (Effiziente Algorithmen und Kombinatorische Optimierung)

Related Project(s)

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(SPP 2037 - Scalable Data Management for Future Hardware):
ReProVide: Query Optimisation and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis
Prof. Dr.-Ing. Klaus Meyer-Wegener; Prof. Dr.-Ing. Jürgen Teich; Dr.-Ing. Stefan Wildermann

HighPerMeshes: Domänenspezifische Programmierung und zielplattformbewusste Compiler-Infrastruktur für Algorithmen auf unstrukturierten Gittern
Dr.-Ing. Frank Hannig
(01/04/2017 - 31/03/2020)

AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich

(TRR 89: Invasive Computing):
TCPA_INT: Integration and Coupling of Tightly Coupled Processor Arrays (T01)
Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/03/2017 - 29/02/2020)

(Security by Reconfiguration):
SecRec: Security by Reconfiguration – Measures against Reverse Engineering and Fault Injection Attacks
Dr.-Ing. Daniel Ziener
(01/01/2017 - 31/12/2019)

Publications (Download BibTeX)

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Afzal, A., Schmitt, C., Alhaddad, S., Grynko, Y., Teich, J., Förstner, J., & Hannig, F. (2018). Solving Maxwell's Equations with Modern C++ and SYCL: A Case Study. In Proceedings of the 29th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (pp. 49-56). Politecnico di Milano, Milan, IT: IEEE.
Ah Sue, J., Hasholzner, R., & Brendel, J. (2018). Improvements in LTE-Advanced Time Series Prediction with Dimensionality Reduction Algorithms. In IEEE (Eds.), Proc. of the IEEE 5G World Forum (pp. 1-10). Santa Clara, CA, US.
Richthammer, V., Schwarzer, T., Wildermann, S., Teich, J., & Glaß, M. (2018). Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems. San Francisco, CA, US.
Smirnov, F., Reimann, F., Teich, J., Han, Z., & Glaß, M. (2018). Automatic Optimization of Redundant Message Routings in Automotive Networks. In ACM (Eds.), Proceedings of 21st International Workshop on Software and Compilers for Embedded Systems (SCOPES 2018). Sankt Goar, DE.
Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A.,... Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In Proceedings of the 26th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). Boulder, CO, USA, US: ACM.
Posewsky, T., & Ziener, D. (2018). A Flexible FPGA-based Inference Architecture for Pruned Deep Neural Networks. In Proceedings of the International Conference on Architecture of Computing Systems. Braunschweig, DE.
Schmitt, C., Hannig, F., & Teich, J. (2018). A Target Platform Description Language for Parallel Code Generation. In Workshop Proceedings of the 31st GI/ITG International Conference on Architecture of Computing Systems (ARCS) (pp. 59-66). Braunschweig, DE: Berlin: VDE VERLAG GmbH.
Fickenscher, J., Schlumberger, J., Hannig, F., Bouzouraa, M.E., & Teich, J. (2018). Cell-based Update Algorithm for Occupancy Grid Maps and new Hybrid Map for ADAS on Embedded GPUs. In IEEE (Eds.), (pp. 443-448). Dresden, Germany, DE: IEEE.
Fickenscher, J., Hannig, F., Teich, J., & Bouzouraa, M.E. (2018). Base Algorithms of Environment Maps and Efficient Occupancy Grid Mapping on Embedded GPUs. (pp. 298-306). Funchal, Madeira, Portugal, PT: SCITEPRESS.
Fey, D., & Hannig, F. (2018). Special Issue on Heterogeneous Real-Time Image Processing. Journal of Real-Time Image Processing, 14(3), 513-515. https://dx.doi.org/10.1007/s11554-018-0763-2
Fickenscher, J., Hannig, F., Bouzouraa, M.E., & Teich, J. (2018). Embedded GPUs in Future Automated Cars. Dresden, DE.
Reiche, O., Özkan, M.A., Hannig, F., Teich, J., & Schmid, M. (2018). Loop Parallelization Techniques for FPGA Accelerator Synthesis. Journal of Signal Processing Systems, 90(1), 3-27. https://dx.doi.org/10.1007/s11265-017-1229-7
Tanase, A.-P., Hannig, F., & Teich, J. (2018). Symbolic Parallelization of Nested Loop Programs. Springer.
Schwarzer, T., Weichslgartner, A., Glaß, M., Wildermann, S., Brand, P., & Teich, J. (2018). Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(2), 297-310. https://dx.doi.org/10.1109/TCAD.2017.2695894
Weichslgartner, A., Wildermann, S., Glaß, M., & Teich, J. (2018). Invasive Computing for Mapping Parallel Programs to Many-Core Architectures. Springer.
Mitra, T., Teich, J., & Thiele, L. (2018). Guest Editors’ Introduction: Special Issue on Time-Critical Systems Design. IEEE Design and Test of Computers, 35(2), 5-7. https://dx.doi.org/10.1109/MDAT.2018.2796037
Ah Sue, J., Brand, P., Brendel, J., Hasholzner, R., Falk, J., & Teich, J. (2018). A Predictive Dynamic Power Management for LTE-Advanced Mobile Devices. Barcelona, Catalonia, Spain, ES.
Khosravi, F., Müller, M., Glaß, M., & Teich, J. (2018). Simulation-based Uncertainty Correlation Modeling in Reliability Analysis. Proceedings of the Institution of Mechanical Engineers, Part O: Journal of Risk and Reliability, (to appear).
Khosravi, F., Borst, M., & Teich, J. (2018). Probabilistic Dominance in Robust Multi-Objective Optimization. In IEEE Congress on Evolutionary Computation (CEC) [to appear]. Barra da Tijuca, Rio de Janeiro, BR.
Brand, P., Falk, J., Ah Sue, J., Brendel, J., Hasholzner, R., & Teich, J. (2018). Reinforcement Learning for Power-Efficient Grant Prediction in LTE. In ACM (Eds.), Proc. of the 21st International Workshop on Software and Compilers for Embedded Systems (pp. 1-8). Sankt Goar, Deutschland, DE.

Last updated on 2017-01-12 at 01:00