Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Beschreibung:

Die Forschungsgebiete des Lehrstuhls umfassen alle Aspekte des systematischen Entwurfs (CAD) eingebetteter Systeme, speziell die Arbeitsgebiete Ablaufplanung (Scheduling), Entwurfsraumexploration, Simulation, Synthese und Codegenerierung. Untersucht werden innovative, adaptive und massiv parallele Rechnerstrukturen, sowie Spezial- und Multiprozessoren und deren Programmierung, als auch die Entwicklung von Methoden und Werkzeugen wie Simulatoren, Compiler und Prototypen. Einen weiteren Schwerpunkt bilden diskrete Optimierungsmethoden, insbesondere lokale und globale Suchverfahren, lineare Programmierung, Mehrzieloptimierungsverfahren und deren Anwendung im Kontext der optimalen Auslegung technischer Systeme.

Adresse:
Cauerstraße 11
91058 Erlangen



Untergeordnete Organisationseinheiten

Juniorprofessur für Informatik
Professur für Informatik (Effiziente Algorithmen und Kombinatorische Optimierung)


Forschungsbereiche

Architecture and Compiler Design
Effiziente Algorithmen und Kombinatorische Optimierung
Reconfigurable Computing
System-Level Design Automation


Forschungsprojekt(e)

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Prof. Dr.-Ing. Jürgen Teich
(01.08.2018 - 31.07.2020)


(DFG-Schwerpunktprogramm (SPP) 2037 - Skalierbares Datenmanagement für zukünftige Hardware):
ReProVide: Anfrageoptimierung und Daten-nahe Verarbeitung auf Rekonfigurierbaren SoCs für Big-Data-Analyse
Prof. Dr.-Ing. Klaus Meyer-Wegener; Dr.-Ing. Stefan Wildermann; Prof. Dr.-Ing. Jürgen Teich
(28.08.2017 - 31.08.2020)


HighPerMeshes: Domänenspezifische Programmierung und zielplattformbewusste Compiler-Infrastruktur für Algorithmen auf unstrukturierten Gittern
PD Dr.-Ing. Frank Hannig
(01.04.2017 - 31.03.2020)


AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich
(13.03.2017)


(TRR 89: Invasives Rechnen):
TCPA_INT: Integration und Verbindung von eng gekoppelten Prozessorfeldern (T01)
PD Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01.03.2017 - 29.02.2020)



Publikationen (Download BibTeX)

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Pourmohseni, B., Smirnov, F., Khdr, H., Wildermann, S., Teich, J., & Henkel, J. (2019). Thermally Composable Hybrid Application Mapping for Real-Time Applications in Heterogeneous Many-Core Systems. In Proceedings of the 40th IEEE Real-Time Systems Symposium (RTSS) (pp. 1-13). Hong Kong, CN.
Witterauf, M., Hannig, F., & Teich, J. (2019). Polyhedral Fragments: An Efficient Representation for Symbolically Generating Code for Processor Arrays. In Proceedings of the International Conference on Formal Methods and Models for System Design (MEMOCODE). San Diego.
Heidorn, C., Witterauf, M., Hannig, F., & Teich, J. (2019). Efficient Mapping of CNNs onto Tightly Coupled Processor Arrays. Journal of Computers, 14(8), 541-556. https://dx.doi.org/10.17706/jcp.14.8.541-556
Becher, A., & Teich, J. (2019). In situ Statistics Generation within partially reconfigurable Hardware Accelerators for Query Processing. In Proceedings of the 15th International Workshop on Data Management on New Hardware (DaMoN) Held with ACM SIGMOD/PODS 2019. Amsterdam, NL.
Pourmohseni, B., Smirnov, F., Wildermann, S., & Teich, J. (2019). Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems. In Proceedings of the 31th Euromicro Conference on Real-Time Systems (ECRTS) (pp. 12:1--12:24). Stuttgart, Germany.
Letras, M., Falk, J., Schwarzer, T., & Teich, J. (2019). On the Analytic Evaluation of Schedules via Max-Plus Algebra for DSE of Multi-Core Architectures. In Proceedings of the 22st International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019, Sankt Goar, Germany (pp. 1-9). Sankt Goar, Germany, DE: ACM.
Groth, S., Schmitt, C., Teich, J., & Hannig, F. (2019). SYCL Code Generation for Multigrid Methods. In Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 41-44). Sankt Goar, DE: ACM.
Fickenscher, J., Hannig, F., & Teich, J. (2019). DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs. In Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck (Eds.), Architecture of Computing Systems -- ARCS 2019 (pp. 71 - 86). Copenhagen, DK: Cham: Springer International Publishing.
Roloff, S., Hannig, F., & Teich, J. (2019). Modeling and Simulation of Invasive Applications and Architectures. Singapore: Springer.
Schwarzer, T., Falk, J., Müller, S., Letras, M., Heidorn, C., Wildermann, S., & Teich, J. (2019). Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization. ACM Transactions on Design Automation of Electronic Systems, 24(3). https://dx.doi.org/10.1145/3310249
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2019). From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. In Proceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization (pp. 242-253). Washington DC, USA, US.
Membarth, R., Dutta, H., Hannig, F., & Teich, J. (2019). Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards. In Transactions on High-Performance Embedded Architectures and Compilers V. (pp. 1-20). Springer.
Brand, M., Witterauf, M., Sousa, É., Tanase, A.-P., Hannig, F., & Teich, J. (2019). *-Predictable MPSoC Execution of Real-Time Control Applications Using Invasive Computing. Concurrency and Computation-Practice & Experience. https://dx.doi.org/10.1002/cpe.5149
Pourmohseni, B., Wildermann, S., Glaß, M., & Teich, J. (2019). Hard Real-Time Application Mapping Reconfiguration for NoC-Based Many-Core Systems. Real-Time Systems, 1-37. https://dx.doi.org/10.1007/s11241-019-09326-y
Teich, J., & Fummi, F. (Eds.) (2019). Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019. .
Echavarria Gutiérrez, J.A., Morales-Reyes, A., Cumplido, R., Salido, M., & Feregrino, C. (2019). IP-Cores Watermarking Scheme at Behavioral Level Using Genetic Algorithms. Engineering Applications of Artificial Intelligence.
Spieck, J., Wildermann, S., Schwarzer, T., Teich, J., & Glaß, M. (2019). Data-Driven Scenario-based Application Mapping for Heterogeneous Many-Core Systems. In Multicore/Many-core Systems-on-Chip (MCSoC 2019). Singapore, SG.
Smirnov, F., Pourmohseni, B., Glaß, M., & Teich, J. (2019). IGOR, get me the Optimum! Prioritizing Important Design Decisions During the DSE of Embedded Systems. In Proceedings of the CODES+ISSS: International Conference on Hardware/Software Codesign and System Synthesis. New York, NY, US.
Teich, J., & Fummi, F. (2019). Conference Reports: Recap of DATE 2019 in Florence, Italy. IEEE Design & Test, 36(4), 59-61. https://dx.doi.org/10.1109/MDAT.2019.2915112
Becher, A., Herrmann, A., Wildermann, S., & Teich, J. (2019). ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing. In Gesellschaft für Informatik, Bonn (Eds.), Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) (pp. 51-70). Universität Rostock, DE: Bonn: Gesellschaft für Informatik.


Zusätzliche Publikationen (Download BibTeX)


Mattauch, S., Lohmann, K., Hannig, F., Lohmann, D., & Teich, J. (2019). Detecting the Gender Gap in Computer Science — A Bibliometric Approach. Communications of the Acm.
Lari, V. (2016). Invasive Tightly Coupled Processor Arrays. In Springer book series on Computer Architecture and Design Methodologies. Singapore: Springer.
Wasza, J., Bauer, S., Haase, S., Schmid, M., Reichert, S., & Hornegger, J. (2011). RITK: The Range Imaging Toolkit - A Framework for 3-D Range Image Stream Processing. In Eisert Peter, Hornegger Joachim, Polthier Konrad (Eds.), VMV 2011: Vision, Modeling & Visualization (pp. 57-64). Berlin, DE.
Streubühr, M., Rosales, R., Hasholzner, R., Haubelt, C., & Teich, J. (2011). ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC. In Forum on specification and Design Languages 2011 (pp. 202-209). Oldenbúrg, DE.
Kiesel, R., Löhlein, O., Terzis, A., Streubühr, M., Haubelt, C., & Teich, J. (2010). Actor-oriented Modeling of Driver Assistance Systems for Efficient Multi-Core ECU Implementation. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (pp. 117-126). Dresden, DE.
Niemann, B., & Haubelt, C. (2006). Formalizing TLM with Communicating State Machines. In Proceedings Forum on Specification and Design Languages (FDL'06) (pp. 285-292). Darmstadt, DE.
Niemann, B., & Haubelt, C. (2006). Assertion-Based Verification of Transaction Level Models. In Proceedings of the 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (pp. 232-236). Dresden, DE.
Haubelt, C. (2005). Automatic Model-Based Design Space Exploration for Embedded Systems - A System Level Approach (Dissertation).
Haubelt, C. (2004). Design Space Exploration for Distributed Hardware Reconfigurable Systems. In Jürgen Becker, Marco Platzner, and Serge Vernalde (Eds.), Field-Programmable Logic and Applications. (pp. 1171). Berlin, Heidelberg: Springer.

Zuletzt aktualisiert 2019-16-08 um 10:17