A DC to 17 GHz Area-Efficient VGA with 20 DB Linear DB Tuning Range in 22 nm FDSOI

Scheller K, Engelmann A, Hetterle P, Löffler J, Weigel R, Schrotz AM, Franchi N (2025)

Publication Type: Conference contribution, Conference Contribution

Publication year: 2025

Publisher: Institute of Electrical and Electronics Engineers Inc.

Pages Range: 374-377

Conference Proceedings Title: 2025 20th European Microwave Integrated Circuits Conference, EuMIC 2025

Event location: Utrecht NL

ISBN: 978-2-87487-082-8

URI: https://ieeexplore.ieee.org/document/11233959

DOI: 10.23919/EuMIC65284.2025.11233959

Abstract

This paper presents an area-efficient, three-stage, differential variable gain amplifier (VGA) integrated into a 22 nm fully-depleted silicon-on-insulator (FDSOI) technology. Variable gain is realized by tuning the common source stage's transconductance, varying the current through a parallel diode-connected load. The VGA features a linear dB gain behavior across a wide tuning range of over 20 dB. The amplifier stages are DC-coupled to avoid the gain reduction at the low baseband frequencies. In the output stage, inductive peaking is used to enlarge the bandwidth, allowing the VGA to cover a 3 dB bandwidth of 17 GHz. One primary design goal is efficient area usage, which is achieved by minimizing the number of required inductors, resulting in a core area of 0.035mm2. The VGA attains a maximal gain of 23 dB, a linear dB tuning range from −3 to 18 dB, and a maximum output power Psat  of 8.9 dBm, a maximum PAE of 6.4% while showing a comprehensive noise figure of 5 to 11 dB. Supplied by 1.4 V, the circuit's power consumption is 112 mW.

Authors with CRIS profile

Kai Scheller Lehrstuhl für Intelligente Technische Elektronik und Systeme Andre Engelmann Lehrstuhl für Intelligente Technische Elektronik und Systeme Philip Hetterle Lehrstuhl für Intelligente Technische Elektronik und Systeme Jens Löffler Lehrstuhl für Intelligente Technische Elektronik und Systeme Robert Weigel Lehrstuhl für Technische Elektronik (LTE) Albert-Marcel Schrotz Lehrstuhl für Intelligente Technische Elektronik und Systeme Norman Franchi Lehrstuhl für Intelligente Technische Elektronik und Systeme

Related research project(s)

Terahertz Digital Chess-Board-Modulated Spread-Spectrum System for Radar and Communication Comprising 200 GHz Bandwidth Integrierte Terahertz-Systeme mit neuartiger Funktionalität (INTEREST) Jan. 1, 2022 - Jan. 1, 2025

How to cite

APA:

Scheller, K., Engelmann, A., Hetterle, P., Löffler, J., Weigel, R., Schrotz, A.-M., & Franchi, N. (2025). A DC to 17 GHz Area-Efficient VGA with 20 DB Linear DB Tuning Range in 22 nm FDSOI. In 2025 20th European Microwave Integrated Circuits Conference, EuMIC 2025 (pp. 374-377). Utrecht, NL: Institute of Electrical and Electronics Engineers Inc..

MLA:

Scheller, Kai, et al. "A DC to 17 GHz Area-Efficient VGA with 20 DB Linear DB Tuning Range in 22 nm FDSOI." Proceedings of the 20th European Microwave Integrated Circuits Conference (EuMIC), Utrecht Institute of Electrical and Electronics Engineers Inc., 2025. 374-377.

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