A TSPC mm-Wave Frequency Divider with up to 50 GHz Input Frequency in 12 nm FinFET Bulk CMOS

Vilyuk K, Scheller K, Hetterle P, Probst F, Engelmann A, Schrotz AM, Franchi N, Weigel R (2025)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2025

Publisher: IEEE

Pages Range: 974 - 977

Event location: San Francisco

URI: https://ieeexplore.ieee.org/document/11103938/authors#authors

DOI: 10.1109/IMS40360.2025.11103938

Abstract

This paper presents a digital frequency divider that utilizes two dynamic TSPC flip-flops for a division ratio of four. The circuit operates over a wide supply voltage range spanning from 0.4 V to 1.0 V and reaches operating frequencies of at least 50 GHz limited by measurement equipment. The circuit draws 560 μA from a 0.7 V supply and achieves a locking range of above 48 GHz with a fixed bias and supply voltage. The demonstrated divider circuit is fabricated in a 12 nm Bulk CMOS FinFET node and occupies a core area of only 2.7 μ², while achieving similar performance to RF frequency dividers fabricated in SOI process nodes. To the best of the authors' knowledge, the presented circuit is the first mm-wave frequency divider built in a FinFET process reaching an operating frequency of 50 GHz while having the smallest reported chip area consumption found in literature.

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How to cite

APA:

Vilyuk, K., Scheller, K., Hetterle, P., Probst, F., Engelmann, A., Schrotz, A.-M.,... Weigel, R. (2025). A TSPC mm-Wave Frequency Divider with up to 50 GHz Input Frequency in 12 nm FinFET Bulk CMOS. In Proceedings of the International Microwave Symposium - IMS 2025 (pp. 974 - 977). San Francisco, US: IEEE.

MLA:

Vilyuk, Konstantin, et al. "A TSPC mm-Wave Frequency Divider with up to 50 GHz Input Frequency in 12 nm FinFET Bulk CMOS." Proceedings of the International Microwave Symposium - IMS 2025, San Francisco IEEE, 2025. 974 - 977.

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