A 290 mV sub-VT ASIC for real-time atrial fibrillation detection

Andersson O, Chon KH, Sörnmo L, Rodrigues JN (2015)

Publication Type: Journal article

Publication year: 2015

Journal

Ieee Transactions on Biomedical Circuits and Systems Institute of Electrical and Electronics Engineers (IEEE)

Book Volume: 9

Pages Range: 377-386

Article Number: 6926866

Journal Issue: 3

DOI: 10.1109/TBCAS.2014.2354054

Abstract

A real-time detector for episodes of atrial fibrillation is fabricated as an application specific integrated circuit (ASIC). The basis for detection is a set of three parameters for characterizing the RR interval series, i.e., turning point ratio, root mean square of successive differences, and Shannon entropy. The developed hardware architecture targets ultra-low voltage operation, suitable for implantable loop recorders with ultra-low energy requirements. Algorithmic and architectural optimizations are performed to minimize area and energy dissipation, with a total area footprint reduction of 44%. The design is fabricated in 65-nm CMOS low-leakage high-threshold technology. Measurements with aggressively scaled supply voltage (VDD) in the subthreshold (sub-VT) region show energy savings of up to 41 X when operating at 1 kHz with a VDD of 300 mV compared to a nominal VDD of 1.2 V.

Involved external institutions

Lund University / Lunds universitet SE Sweden (SE) University of Connecticut US United States (USA) (US)

How to cite

APA:

Andersson, O., Chon, K.H., Sörnmo, L., & Rodrigues, J.N. (2015). A 290 mV sub-VT ASIC for real-time atrial fibrillation detection. Ieee Transactions on Biomedical Circuits and Systems, 9(3), 377-386. https://doi.org/10.1109/TBCAS.2014.2354054

MLA:

Andersson, Oskar, et al. "A 290 mV sub-VT ASIC for real-time atrial fibrillation detection." Ieee Transactions on Biomedical Circuits and Systems 9.3 (2015): 377-386.

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