Algorithm and hardware aspects of pre-coding in massive MIMO systems
Prabhu H, Rodrigues J, Liu L, Edfors O (2016)
Publication Type: Conference contribution
Publication year: 2016
Journal
Publisher: IEEE Computer Society
Book Volume: 2016-February
Pages Range: 1144-1148
Conference Proceedings Title: Conference Record - Asilomar Conference on Signals, Systems and Computers
Event location: Pacific Grove, CA, USA
ISBN: 9781467385763
DOI: 10.1109/ACSSC.2015.7421319
Abstract
Massive Multiple-Input Multiple-Output (MIMO) systems have been shown to improve both spectral and energy efficiency one or more orders of magnitude by efficiently exploiting the spatial domain. Low-cost RF chains can be employed to reduce the Base Station (BS) cost, however this may require additional baseband processing to handle induced distortions due to the hardware impairments. In this article the reduction of Peak-to-Average power Ratio (PAR) of the transmitted signals and IQ imbalance in the mixer are analyzed for the down-link. We analyze various pre-coding schemes and estimate the required processing energy per transmitted information bit. Simulation on gate-level show that the energy cost of performing pre-coding and tackling of hardware impairments are low, in the order of few pJ per bit.
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APA:
Prabhu, H., Rodrigues, J., Liu, L., & Edfors, O. (2016). Algorithm and hardware aspects of pre-coding in massive MIMO systems. In Michael B. Matthews (Eds.), Conference Record - Asilomar Conference on Signals, Systems and Computers (pp. 1144-1148). Pacific Grove, CA, USA: IEEE Computer Society.
MLA:
Prabhu, Hemanth, et al. "Algorithm and hardware aspects of pre-coding in massive MIMO systems." Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015, Pacific Grove, CA, USA Ed. Michael B. Matthews, IEEE Computer Society, 2016. 1144-1148.
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