Scheller K, Engelmann A, Hetterle P, Weigel R, Schrotz AM, Fischer G (2025)
Publication Type: Conference contribution, Conference Contribution
Publication year: 2025
Publisher: IEEE
ISBN: 979-8-3315-4040-1
URI: https://ieeexplore.ieee.org/document/10880553
DOI: 10.1109/LAMC63321.2025.10880553
This paper presents a sub-THz push-push frequency doubler with a D-band power amplifier (PA) chain demonstrated in a 22 nm fully-depleted silicon-on-insulator (FDSOI) technology. The D-band PA comprises three common-source (CS) driver stages and a high-power stacked output stage. The amplifier stages utilize the capacitive neutralization technique for gain-boosting. Two parallel push-push doubler stages are employed
after the PA. The input power distribution and matching to the PA optimum load-pull point are achieved by leveraging an area-efficient stacked transformer with two secondary coils. The overall circuitry occupies a compact core area of 0.0625 mm2. The PA and frequency doubler attains a maximal gain of 7 dB and a saturated output power Psat of -5 dBm, covering a 60 GHz 3 dB-bandwidth. Furthermore, the circuits exhibits a minimum suppression of 35 dBc to the fundamental frequency. The circuit’s DC-power consumption is below 230 mW, supplied by 1.6 V and 0.8 V.
APA:
Scheller, K., Engelmann, A., Hetterle, P., Weigel, R., Schrotz, A.-M., & Fischer, G. (2025). A Broadband Sub-THz Push-Push Frequency Doubler in 22 nm FDSOI. In Proceedings of the IEEE MTT-S Latin America Microwave Conference (LAMC-2025). San Juan, PR: IEEE.
MLA:
Scheller, Kai, et al. "A Broadband Sub-THz Push-Push Frequency Doubler in 22 nm FDSOI." Proceedings of the IEEE MTT-S Latin America Microwave Conference (LAMC-2025), San Juan IEEE, 2025.
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