A Novel Integrated Power Detection Circuit for Low Noise Amplifiers in Cellular Applications

Spielberger A, Scheller K, Engelmann A, Franchi N, Weigel R, Pfannenmüller C (2025)

Publication Status: Accepted

Publication Type: Unpublished / Preprint

Future Publication Type: Conference contribution

Publication year: 2025

Event location: Cocoa Beach, Florida

Abstract

A novel power sensing method, integrated in low
noise amplifier architectures is presented and demonstrated in
130 nm SiGe BiCMOS technology. The power sensor architecture
can be utilized to detect blocking signals by supply current varia-
tions caused from different amplifier saturation states. Therefore
the combined amplifier/power sensor architecture overcomes the
need of additional components in the RF signal path for input
power sensing. Two sensor architectures are compared while one
is implemented. The architectures ability to indicate input power
by amplifier saturation is proven by measurement. It is shown
that the sensor gives direct feedback at early stages before the
amplifier is in full saturation. The amplifier achieves a maximum
gain of 14.31 dB and is optimized for the 5G low-band frequency
range from 600 MHz to 1 GHz.

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How to cite

APA:

Spielberger, A., Scheller, K., Engelmann, A., Franchi, N., Weigel, R., & Pfannenmüller, C. (2025). A Novel Integrated Power Detection Circuit for Low Noise Amplifiers in Cellular Applications. (Unpublished, Accepted).

MLA:

Spielberger, Alexander, et al. A Novel Integrated Power Detection Circuit for Low Noise Amplifiers in Cellular Applications. Unpublished, Accepted. 2025.

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