Deeg F, Sattler S (2024)
Publication Type: Conference contribution
Publication year: 2024
Publisher: VDE Verlag GmbH
Book Volume: 108
Pages Range: 84-88
Conference Proceedings Title: GMM-Fachberichte
Event location: Dortmund, DEU
ISBN: 9783800762859
We present a new approach for designing an asynchronous control unit for a RISC-V processor using dual-rail domino logic and a self-locking mechanism. The proposed method is based on the observation that dual-rail domino logic can be mapped to look-up tables in FPGAs. This allows for the design of a self-locking asynchronous control unit that is both inherently structurally safe and efficient. First we discuss the concept of dual-rail domino logic and its advantages for asynchronous circuits. A self-locking mechanism is presented that can be used to prevent asynchronous circuits from entering erroneous states. The mechanism is based on the use of a pulse circuit that locks the input, triggers a precharge and then an evaluate phase until it acknowledges the outputs and unlocks the input. This ensures that the circuit is in a stable state before it starts the computation. Afterwards, we apply the proposed approach to the design of an asynchronous control unit for a RISC-V processor. The control unit is implemented using look-up tables and function stable circuits. The result is a control unit that is both safe and efficient.
APA:
Deeg, F., & Sattler, S. (2024). Self-Locked Asynchronous Controller for RISC-V Architecture on FPGA. In GMM-Fachberichte (pp. 84-88). Dortmund, DEU: VDE Verlag GmbH.
MLA:
Deeg, Florian, and Sebastian Sattler. "Self-Locked Asynchronous Controller for RISC-V Architecture on FPGA." Proceedings of the 15th GMM GMA Symposium on Automotive meets Electronics and Control, AmEC 2024, Dortmund, DEU VDE Verlag GmbH, 2024. 84-88.
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