Multilayer Multipurpose Caches for OpenMP Target Regions on FPGAs

Brandner J, Mayer F, Philippsen M (2024)

Publication Language: English

Publication Type: Conference contribution, Original article

Publication year: 2024

Publisher: Springer

Series: Springer’s Lecture Notes in Computer Science (LNCS)

City/Town: Cham

Book Volume: 15195

Pages Range: 79–93

Conference Proceedings Title: OpenMP: Advancing OpenMP for Future Accelerators

Event location: Perth, Australia AU

ISBN: 978-3-031-72566-1

DOI: 10.1007/978-3-031-72567-8_6

Abstract

Multipurpose caches can improve the throughput between the FPGA’s memory and the hardware that is generated when offloading OpenMP target regions. We discuss and evaluate the weaknesses (and also advantages) of different cacheing techniques in this context. Our OpenMP-to-FPGA compiler fully automatically combines and inserts them as a multilayer cache to get the best of all worlds. We evaluate on a diverse benchmark and achieve an average speedup of 3.65, outperforming 1-layer caches both in terms of runtime and resilience.

Authors with CRIS profile

Julian Brandner Lehrstuhl für Informatik 2 (Programmiersysteme) Florian Mayer Lehrstuhl für Informatik 2 (Programmiersysteme) Michael Philippsen Lehrstuhl für Informatik 2 (Programmiersysteme)

How to cite

APA:

Brandner, J., Mayer, F., & Philippsen, M. (2024). Multilayer Multipurpose Caches for OpenMP Target Regions on FPGAs. In Espinosa, A., Klemm, M., de Supinski, B.R., Cytowski, M., Klinkenberg, J. (Eds.), OpenMP: Advancing OpenMP for Future Accelerators (pp. 79–93). Perth, Australia, AU: Cham: Springer.

MLA:

Brandner, Julian, Florian Mayer, and Michael Philippsen. "Multilayer Multipurpose Caches for OpenMP Target Regions on FPGAs." Proceedings of the Proceedings of the 20th International Workshop on OpenMP, IWOMP 2024, Perth, Australia Ed. Espinosa, A., Klemm, M., de Supinski, B.R., Cytowski, M., Klinkenberg, J., Cham: Springer, 2024. 79–93.

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