Analysis of the effects of voids on crack initiation in solder joints of high-power LEDs

Xu P, Ke R, Rauer M, Kaloudis M, Franke J (2018)


Publication Type: Conference contribution

Publication year: 2018

Publisher: Institute of Electrical and Electronics Engineers Inc.

Pages Range: 216-221

Conference Proceedings Title: 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2018

Event location: Kuwana, Mie, JPN

ISBN: 9784990218850

DOI: 10.23919/ICEP.2018.8374706

Abstract

In this investigation, the influences of voids on the crack initiation of the solder joints of high-power LED applications were studied. For the experimental analysis, power cycling tests with and without superimposed temperature cycling have been carried out. By using nondestructive test method of computed tomography (CT), the initiation and development of the cracks and failures during the aging tests were documented. In order to evaluate the different sizes, numbers and distributions of voids and their impact on the crack initiation in the solder joints, simulation approach with finite element method (FEM) has been applied. Based on the verified simulation model, further evaluations showed that the thickness of the solder joint had the strongest influence on the crack initiation, followed by the number of the voids. Critical areas of the solder joints in terms of crack formation have also been identified.

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APA:

Xu, P., Ke, R., Rauer, M., Kaloudis, M., & Franke, J. (2018). Analysis of the effects of voids on crack initiation in solder joints of high-power LEDs. In 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2018 (pp. 216-221). Kuwana, Mie, JPN: Institute of Electrical and Electronics Engineers Inc..

MLA:

Xu, Ping, et al. "Analysis of the effects of voids on crack initiation in solder joints of high-power LEDs." Proceedings of the 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2018, Kuwana, Mie, JPN Institute of Electrical and Electronics Engineers Inc., 2018. 216-221.

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