Design of a Low Voltage D-band LNA in 22 nm FDSOI
Hetterle P, Engelmann A, Probst F, Weigel R, Dietz M (2022)
Publication Language: English
Publication Type: Conference contribution, Conference Contribution
Publication year: 2022
Publisher: IEEE
Conference Proceedings Title: 17th European Microwave Integrated Circuits Conference (EuMIC)
Event location: Allianz MiCo
Piazzale Carlo Magno, 1
20149 Milano
ISBN: 978-2-87487-070-5
URI: https://ieeexplore.ieee.org/document/9923520
DOI: 10.23919/EuMIC54520.2022.9923520
Abstract
This paper presents a low voltage D-band Low Noise Amplifier (LNA) manufactured in a 22nm fully-depleted silicon-on-insulator FDSOI CMOS technology. The circuit consists of 4 differential stages. The first stage is optimized for minimal noise, while the other three are optimized to achieve maximum gain. Therefore,
a capacitive neutralization technique is applied. Transmissionline-based matching networks are used to match the stages for a bandwidth of over 20 GHz. The measurement results show a gain of 17 dB while achieving a low noise figure of less than 8 dB at a supply voltage of only 0.8V.
Authors with CRIS profile
Philip Hetterle
Lehrstuhl für Technische Elektronik
Andre Engelmann
Lehrstuhl für Technische Elektronik
Florian Probst
Lehrstuhl für Technische Elektronik
Robert Weigel
Lehrstuhl für Technische Elektronik
Marco Dietz
Lehrstuhl für Technische Elektronik
Related research project(s)
How to cite
APA:
Hetterle, P., Engelmann, A., Probst, F., Weigel, R., & Dietz, M. (2022). Design of a Low Voltage D-band LNA in 22 nm FDSOI. In 17th European Microwave Integrated Circuits Conference (EuMIC). Allianz MiCo Piazzale Carlo Magno, 1 20149 Milano, IT: IEEE.
MLA:
Hetterle, Philip, et al. "Design of a Low Voltage D-band LNA in 22 nm FDSOI." Proceedings of the European Microwave Integrated Circuits Conference, Allianz MiCo Piazzale Carlo Magno, 1 20149 Milano IEEE, 2022.
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