Reducing OpenMP to FPGA Round-trip Times with Predictive Modelling

Brandner J, Mayer F, Philippsen M (2022)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2022

Publisher: Springer

Series: Springer’s Lecture Notes in Computer Science (LNCS)

Book Volume: 13527

Pages Range: 94-108

Conference Proceedings Title: OpenMP in a Modern World: From Multi-device Support to Meta Programming

Event location: Chattanooga, TN US

ISBN: 978-3-031-15921-3

DOI: 10.1007/978-3-031-15922-0

Abstract

Recent works aimed at expanding the target offloading capabilities of OpenMP to FPGA platforms. While enabling the easy construction of heterogeneous systems, the approach has to face a major hurdle: by blurring the line between software and hardware development, it forces software developers to consider hardware limitations. This can be difficult through the abstractions that OpenMP introduces over the generated hardware. The high level synthesis tools used by OpenMP compilers to generate hardware already offer predictions on hardware usage. Their value for OpenMP offloading however is questionable. This paper is based on the data mining we conducted on thousands of kernel variations. It demonstrates and proofs under which circumstances these predictions can be trusted in the context of OpenMP to FPGA offloading and concludes by showing how to derive runtime performance predictions from them. The model we present can be used without experience in hardware development and quickly predicts runtime on our benchmarks with an average Pearson correlation of 0.897. This knowledge allows developers to make fast, informed design decisions.

Authors with CRIS profile

Julian Brandner Lehrstuhl für Informatik 2 (Programmiersysteme) Florian Mayer Lehrstuhl für Informatik 2 (Programmiersysteme) Michael Philippsen Lehrstuhl für Informatik 2 (Programmiersysteme)

Related research project(s)

OpenMP for reconfigurable heterogenous architectures (ORKA) OpenMP für rekonfigurierbare heterogene Architekturen Nov. 1, 2017 - Dec. 31, 2023

How to cite

APA:

Brandner, J., Mayer, F., & Philippsen, M. (2022). Reducing OpenMP to FPGA Round-trip Times with Predictive Modelling. In Michael Klemm, Bronis R. de Supinski, Jannis Klinkenberg, Brandon Neth (Eds.), OpenMP in a Modern World: From Multi-device Support to Meta Programming (pp. 94-108). Chattanooga, TN, US: Springer.

MLA:

Brandner, Julian, Florian Mayer, and Michael Philippsen. "Reducing OpenMP to FPGA Round-trip Times with Predictive Modelling." Proceedings of the 18th International Workshop on OpenMP (IWOMP 2022), Chattanooga, TN Ed. Michael Klemm, Bronis R. de Supinski, Jannis Klinkenberg, Brandon Neth, Springer, 2022. 94-108.

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