Design Space Exploration for Layer-parallel Execution of Convolutional Neural Networks on CGRAs

Heidorn C, Hannig F, Teich J (2020)

Publication Type: Conference contribution, Conference Contribution

Publication year: 2020

Publisher: ACM

Pages Range: 26-31

Conference Proceedings Title: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES)

Event location: St. Goar DE

ISBN: 978-1-4503-7131-5

DOI: 10.1145/3378678.3391878

Abstract

In this work, we systematically explore the design space of throughput, energy, and hardware costs for layer-parallel mappings of Convolutional Neural Networks (CNNs) onto coarse-grained reconfigurable arrays (CGRAs). We derive an analytical model that computes the required resources (processing elements) and buffer memory and thus hardware cost C to sustain a given throughput T as well as the resulting overall energy consumption E for inference. Further, we propose an efficient design space exploration (DSE) to determine the
fronts of Pareto-optimal (T,E,C) solutions. This exploration helps to determine the limits of scalability of the presented tiled CGRA accelerator architectures in terms of throughput, the number of parallel layers that can be simultaneously processed, and memory requirements. Finally, we provide an evaluation of energy savings achievable on our architecture in comparison to implementations that execute sequentially a CNN layer-by-layer. In experiments, it is shown that layer-parallel processing is able to reduce energy consumption E by 3.6×, hardware cost C by 1.2×, and increase the achievable throughput T by 6.2× for MobileNet.

Authors with CRIS profile

Christian Heidorn Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

DFG SFB/Transregio 89 "Invasive Computing" (TRR 89) July 1, 2010 - Dec. 31, 2022 AI Laboratory for System-level Design of ML-based Signal Processing Applications (KISS) Oct. 1, 2019 - Jan. 31, 2022

How to cite

APA:

Heidorn, C., Hannig, F., & Teich, J. (2020). Design Space Exploration for Layer-parallel Execution of Convolutional Neural Networks on CGRAs. In Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 26-31). St. Goar, DE: ACM.

MLA:

Heidorn, Christian, Frank Hannig, and Jürgen Teich. "Design Space Exploration for Layer-parallel Execution of Convolutional Neural Networks on CGRAs." Proceedings of the International Workshop on Software and Compilers for Embedded Systems (SCOPES), St. Goar ACM, 2020. 26-31.

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