A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM

Reuben JR, Fey D (2019)

Publication Type: Conference contribution

Publication year: 2019

Publisher: Institute of Electrical and Electronics Engineers Inc.

Conference Proceedings Title: 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings

Event location: Helsinki FI

ISBN: 9781728127699

DOI: 10.1109/NORCHIP.2019.8906921

Abstract

The quest to increase memory density in Resistive Random Access Memory (RRAM) has motivated researchers to store more bits/cell by implementing Multi-Level Cell (MLC) or multi-bit RRAM. Implementing multiple states narrows the distance between states, making sensing of MLC RRAM a challenging task. In this paper, we present a circuit which senses the state of a MLC by converting the current drawn from the cell to voltage pulses, where the number of pulses is proportional to the current's magnitude. The circuit distinguishes between the states by the relative current's magnitude and hence does not require an absolute reference. Simulations in IHP's 130 nm CMOS technology confirmed fast (single step) sensing while tolerating appropriate variations in the sensed resistance. The proposed circuit is also area efficient when compared to conventional parallel sensing approach.

Authors with CRIS profile

John Reuben Prabahar Lehrstuhl für Informatik 3 (Rechnerarchitektur) Dietmar Fey Lehrstuhl für Informatik 3 (Rechnerarchitektur)

How to cite

APA:

Reuben, J.R., & Fey, D. (2019). A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM. In Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Roning (Eds.), 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings. Helsinki, FI: Institute of Electrical and Electronics Engineers Inc..

MLA:

Reuben, John Reuben, and Dietmar Fey. "A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM." Proceedings of the 5th IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019, Helsinki Ed. Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Roning, Institute of Electrical and Electronics Engineers Inc., 2019.

BibTeX: Download