A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with -101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and -187 dBc/Hz FoMT

Rimmelspacher J, Weigel R, Hagelauer AM, Issakov V (2018)

Publication Status: Accepted

Publication Type: Conference contribution, Conference Contribution

Future Publication Type: Conference contribution

Publication year: 2018

Event location: Dresden DE

DOI: 10.1109/esscirc.2018.8494241

Abstract

This paper presents a 60 GHz Quad-Core push-push VCO in 45 nm partially depleted Silicon-on-Insulator (SOI) CMOS. The measured phase noise (PN) at 60.5 GHz is −101.7 dB/Hz at 1 MHz offset from carrier. The continuous frequency-tuning range (FTR) is 19 %. The Quad-Core VCO consumes only 40 mW DC power. The complete circuit including fundamental and second harmonic (H2) output buffers draws 110 mA from a single 1 V supply. The VCO cores are coupled via resonant-tank transformers. A similar transformer-coupled Dual-Core VCO is fabricated and measured to prove the relative PN improvement between Dual-Core and Quad-Core topology. The total area of the Quad-Core VCO excluding pads is 0.1 mm2.

Authors with CRIS profile

Johannes Rimmelspacher Lehrstuhl für Technische Elektronik (LTE) Robert Weigel Lehrstuhl für Technische Elektronik (LTE) Amelie Marietta Hagelauer Lehrstuhl für Technische Elektronik (LTE)

Involved external institutions

Infineon Technologies AG DE Germany (DE)

How to cite

APA:

Rimmelspacher, J., Weigel, R., Hagelauer, A.M., & Issakov, V. (2018). A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with -101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and -187 dBc/Hz FoMT. In Proceedings of the European Solid-State Circuits Conference (ESSCIRC). Dresden, DE.

MLA:

Rimmelspacher, Johannes, et al. "A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with -101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and -187 dBc/Hz FoMT." Proceedings of the European Solid-State Circuits Conference (ESSCIRC), Dresden 2018.

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