Automatic Success Tree-Based Reliability Analysis for the Consideration of Transient and Permanent Faults

Aliee H, Glaß M, Reimann F, Teich J (2013)

Publication Type: Conference contribution

Publication year: 2013

Publisher: IEEE Press

Edited Volumes: Proceedings -Design, Automation and Test in Europe, DATE

City/Town: New York, NY, USA

Pages Range: 1621-1626

Conference Proceedings Title: Proc. Design, Automation and Test in Europe

Event location: Grenoble FR

ISBN: 978-1-4503-2153-2

DOI: 10.7873/DATE.2013.329

Abstract

Success tree analysis is a well-known method to quantify the dependability features of many systems. This paper presents a system-level methodology to automatically generate a success tree from a given embedded system implementation and subsequently analyzes its reliability based on a state-of-the-art Monte Carlo simulation. This enables the efficient analysis of transient as well as permanent faults while considering methods such as task and resource redundancy to compensate these. As a case study, the proposed technique is compared with two analysis techniques, successfully applied at system level: (1) a BDD-based reliability analysis technique and (2) a SAT-assisted approach, both suffering from exponential complexity in either space or time. Experimental results performed on an extensive test suite show that: (a) Opposed to the Success Tree (ST) and SAT-assisted approaches, the BDD-based approach is highly vulnerable to exhaust available memory during its construction for moderate and large test cases. (b) The proposed ST technique is competitive to the SAT-assisted analysis in analysis speed and accuracy, while being the only technique that is suitable to also handle large and complex system implementations in which permanent and transient faults may occur concurrently. © 2013 EDAA.

Authors with CRIS profile

Hananeh Aliee Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Michael Glaß Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Felix Reimann Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

SystemCoDesigner: System level design space exploration for embedded systems (SystemCoDesigner) April 1, 2005 - April 1, 2008

How to cite

APA:

Aliee, H., Glaß, M., Reimann, F., & Teich, J. (2013). Automatic Success Tree-Based Reliability Analysis for the Consideration of Transient and Permanent Faults. In Proc. Design, Automation and Test in Europe (pp. 1621-1626). Grenoble, FR: New York, NY, USA: IEEE Press.

MLA:

Aliee, Hananeh, et al. "Automatic Success Tree-Based Reliability Analysis for the Consideration of Transient and Permanent Faults." Proceedings of the Design, Automation and Test in Europe (DATE), Grenoble New York, NY, USA: IEEE Press, 2013. 1621-1626.

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