Yield Analysation and Optimization Methods for Active CMOS Pixels

Lindner C, Söll C, Röber J, Bänisch A, Weigel R (2015)

Publication Type: Conference contribution

Publication year: 2015

Pages Range: 107-114

Event location: Siegen, Germany

ISBN: 978-3-8007-4071-0

Abstract

This work explains how to simulate error sources in image sensors to analyze yield. Moreover, two circuitry-wise methods to reduce these interferences are proposed and their influences on yield and standard deviation caused by process variations and reset noise are analyzed. Thereby the biggest sources of interference within the pixel architectures are described. After comparing three different pixel architectures, their extracted layout is simulated and the results are compared. Especially the change of the yield and the standard deviation with and without the use of DS and CDS are analyzed. By applying the methods mentioned before the yield could be increased by up to 15.6 \%.

Authors with CRIS profile

How to cite

APA:

Lindner, C., Söll, C., Röber, J., Bänisch, A., & Weigel, R. (2015). Yield Analysation and Optimization Methods for Active CMOS Pixels. In Proceedings of the 8. GMM/ITG/GI-Fachtagung Zuverlässigkeit und Entwurf (ZuE) (pp. 107-114). Siegen, Germany.

MLA:

Lindner, Claus, et al. "Yield Analysation and Optimization Methods for Active CMOS Pixels." Proceedings of the 8. GMM/ITG/GI-Fachtagung Zuverlässigkeit und Entwurf (ZuE), Siegen, Germany 2015. 107-114.

BibTeX: Download